Quantum Computing: A Pathway to Quantum Logic Design

272 Pages·2020·10.644 MB·English

by  Hafiz Md. Hasan Babu

Quantum Computing
A pathway to quantum logic design

Quantum Computing
A pathway to quantum logic design
Hafiz Md Hasan Babu
Department of Computer Science and Engineering, University of Dhaka,
Dhaka-1000, Bangladesh
IOP Publishing, Bristol, UK
ªIOPPublishingLtd2020
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ISBN 978-0-7503-2747-3(ebook)
ISBN 978-0-7503-2745-9(print)
ISBN 978-0-7503-2748-0(myPrint)
ISBN 978-0-7503-2746-6(mobi)
DOI 10.1088/978-0-7503-2747-3
Version:20200501
IOPebooks
BritishLibraryCataloguing-in-PublicationData:Acataloguerecordforthisbookisavailable
fromtheBritishLibrary.
PublishedbyIOPPublishing,whollyownedbyTheInstituteofPhysics,London
IOPPublishing,TempleCircus,TempleWay,Bristol,BS16HG,UK
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Coverimage:Anartisticinterpretationofa4-bitquantumripplecarryadderinspiredbyand
adaptedfromimageryinLisaNJandBabuHMH,“Acompactrealizationofann-bitquantum
carryskipaddercircuitwithoptimaldelay,”2014NASA/ESAConferenceonAdaptiveHardware
andSystems(AHS),Leicester,2014,pp270–7withpermissionoftheIEEE.
To my beloved parents and also to my beloved wife, daughter, and son,
who made it possible for me to write this book.

Contents
Preface xvi
Acknowledgments xviii
Author biography xix
Part I Quantum logic
1 Quantum logic 1-1
1.1 Overview 1-1
1.2 Motivations towards quantum computing 1-2
1.3 The relationship between reversible and quantum logic 1-2
1.4 Quantum computers 1-3
1.5 The working principles of quantum computers 1-4
1.6 The evolution of quantum computers 1-4
1.7 Why pursue quantum computing? 1-6
1.8 Summary 1-6
Further reading 1-6
2 Basic definitions of quantum logic 2-1
2.1 The quantum bit 2-1
2.2 The quantum gate 2-2
2.2.1 The quantum Feynman gate 2-2
2.2.2 The quantum Tofolli gate 2-2
2.2.3 The quantum Fredkin gate 2-3
2.3 Garbage outputs 2-3
2.4 Constant inputs 2-3
2.5 Area 2-4
2.6 Power 2-4
2.7 Delay 2-4
2.8 Depth 2-5
2.9 Quantum cost 2-5
2.10 Quantum gate calculation complexity 2-5
2.11 Summary 2-6
Further reading 2-6
vii
QuantumComputing
3 The quantum bit string comparator 3-1
3.1 Characteristics of a comparator 3-1
3.2 The magnitude comparator 3-1
3.3 The design of a quantum comparator 3-2
3.3.1 Example 3-6
3.4 Summary 3-8
Further reading 3-9
4 The quantum adder and subtractor 4-1
4.1 The quantum adder 4-1
4.1.1 The quantum full-adder 4-1
4.2 The quantum subtractor 4-3
4.2.1 The quantum half-subtractor 4-3
4.2.2 The quantum full-subtractor 4-4
4.3 Summary 4-5
Further reading 4-5
5 The quantum multiplexer and demultiplexer 5-1
5.1 The quantum multiplexer 5-1
5.1.1 The quantum 2-to-1 multiplexer 5-1
5.1.2 The quantum 4-to-1 multiplexer 5-2
5.1.3 The quantum 2n-to-1 multiplexer 5-2
5.2 The quantum demultiplexer 5-4
5.2.1 The quantum 1-to-2 demultiplexer 5-4
5.2.2 The quantum 1-to-4 demultiplexer 5-4
5.2.3 The quantum 1-to-2n demultiplexer 5-5
5.3 Summary 5-6
Further reading 5-7
6 Quantum adder circuits 6-1
6.1 The carry skip adder 6-1
6.2 The quantum comparison circuit 6-2
6.3 The quantum 2-to-1 multiplier circuit 6-2
6.4 The design of a quantum carry skip adder 6-3
6.4.1 The four-bit quantum carry skip adder 6-3
6.4.2 The n-bit quantum carry skip adder 6-5
viii
QuantumComputing
6.4.3 Calculation of the area and power of a quantum carry skip 6-5
adder circuit
6.4.4 Complexity of the n-bit quantum carry skip adder circuit 6-7
6.5 The quantum BCD adder 6-9
6.6 Summary 6-12
Further reading 6-12
7 The quantum multiplier–accumulator 7-1
7.1 The importance of the quantum multiplier–accumulator 7-2
7.2 The multiplication technique 7-2
7.3 Reduction of the garbage outputs and ancillary inputs of 7-7
quantum circuits
7.4 The design of a quantum multiplier circuit 7-8
7.4.1 The quantum ANDing circuit 7-8
7.4.2 The quantum full-adder circuit 7-8
7.4.3 The n × n-qubit quantum multiplier 7-12
7.5 Summary 7-14
Further reading 7-15
8 The quantum divider 8-1
8.1 Division algorithms 8-1
8.1.1 Classical integer division algorithms 8-1
8.1.2 Quantum integer division algorithms 8-2
8.2 The importance of the quantum divider 8-2
8.3 The tree-based quantum division technique 8-3
8.3.1 Definitions and properties of the division technique 8-3
8.3.2 The algorithm of the division technique 8-4
8.4 The design of a quantum divider circuit 8-9
8.4.1 A technique to minimize the number of ancillary inputs in the 8-9
quantum circuit realization
8.4.2 The components of the quantum divider circuit 8-12
8.5 Summary 8-19
Further reading 8-20
9 The quantum BCD priority encoder 9-1
9.1 The properties of an encoder 9-1
9.2 The design of a quantum BCD priority encoder circuit 9-2
ix