QCA1990 NFC Controller SoC

42 Pages·2014·0.496 MB·English

by  Qualcomm Technologies Inc.

QCA1990 NFC Controller SoC
Device Specification
80-Y0597-1 Rev. M
August 12, 2014
Confidential and Proprietary – Qualcomm Atheros, Inc.
NO PUBLIC DISCLOSURE PERMITTED: Please report postings of this document on public servers or websites
to: [email protected].
Restricted Distribution: Not to be distributed to anyone who is not an employee of either Qualcomm or its
subsidiaries without the express approval of Qualcomm’s Configuration Management.
Not to be used, copied, reproduced, or modified in whole or in part, nor its contents revealed in any manner to others
without the express written permission of Qualcomm Atheros, Inc.
Qualcomm is a registered trademark of QUALCOMM Incorporated. Atheros is a registered trademark of Qualcomm
Atheros, Inc. MSM is a trademark of QUALCOMM Incorporated, registered in the United States and other countries.
All other registered and unregistered trademarks are the property of QUALCOMM Incorporated, Qualcomm Atheros,
Inc., or their respective owners and used with permission. Registered marks owned by QUALCOMM Incorporated
and Qualcomm Atheros, Inc. are registered in the United States and may be registered in other countries. ARM is a
registered trademark of ARM Limited.
This technical data may be subject to U.S. and international export, re-export, or transfer (“export”) laws. Diversion
contrary to U.S. and international law is strictly prohibited.
Qualcomm Atheros, Inc.
1700 Technology Drive
San Jose, CA 95110
U.S.A.
© 2012-2014 Qualcomm Atheros, Inc.
Revision history
Revision Date Description
A September 2012 Initial release
B November 2012  Updated pad names
 Added Chapter 3, Electrical Specifications
C March 2013  Updated Table1-1
 Updated Figure1-1
 Updated Table2-2
 Updated Table3-1
 Updated Section3.4
D June 2013  Table 1-2: Updated the Secure element interfaces
 Section 1.2: Removed a row in the Digital baseband block
 Updated Figure 1-1
 Figure 2-1: Updated pins 2, 5, 7, 8, 14, 17, 21, 22, 25, 26, 28, and 29
 Table 2-2: Removed the RX_In row
 Table 2-3: Updated pad names and functional descriptions
 Table 2-4: Updated information about Pad 5, Pad 20, and Pad 25
 Table 2-6 and Table 2-7: Updated several pad names
 Table 3-1 and Table 3-2: Updated two pad names
 Table 3-3:
 Updated power consumption values
 Removed Field wake and RF poll rows
 Table 3-8: Added Min and Max values for RPU and RPD
 Table 3-10: Updated Min and Max values for Frequency Variation over
temperature
 Removed the RX_IN section (formerly Section 3.5)
 Section 4:
 Updated the maximum height of the 30 WLNSP package
 Updated ball pad names in Table 4-1
 Replaced the placeholders with complete information in Section 4.1,
Section 4.2, Section 4.3, and Section 4.4
 Section 5: Replaced the placeholders with complete information about the
carrier, tape and reel, storage, handling, and barcode label and packing
for shipment
 Section 6: Replaced the placeholder with complete information
80-Y0597-1 Rev. M MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION 2
Confidential and Proprietary – Qualcomm Atheros, Inc.
QCA1990 NFC Controller SoC Device Specification
Revision Date Description
E July 2013  Updated Figure 1-1: QCA1990 functional block diagram
 Updated Table 1-1: QCA1990 features
 Updated Table 2-4: Digital baseband pin descriptions
 Updated Table 3-1: Absolute maximum ratings
 Updated Table 3-2: Operating conditions and added a note
 Updated Table 3-3: DC power consumption
 Updated Table 3-5: TX_OUTP and TX_OUTM pin characteristics
 Updated Table 3-6: DC output resistance for TX_OUTP and
 TX_OUTM (Tx initiator)
 Updated Table 3-7: DC output resistance for TX_OUTP and
 TX_OUTM (Tx target)
 Updated Table 3-8: Digital logic characteristics
 Updated Table 3-9: Drive strengths and added a note
 Added a note for Table 3-10: Clock reference requirement
 Updated Table 4-2: Part marking line description
 Updated Table 4-3: QCA1990 device identification details
F September 2013  Replaced Figure 1-1
 Removed RF voltage row detected from Table 3-4
 Updated High level input voltage Min value and Low level input voltage
Max value in Table 3-5
 Updated Table 3-6
 Updated VDD_PA_3P0V_OUT values in Table 3-7
 Updated Max values for Voltage swing and Phase noise, and removed
Min values for Phase noise in Table 3-10
 Updated the product revision code for the CS sample type in Table 4-3
G October 2013  Updated Section 1.1, Chapter 3 description
 Chapter 3:
 Updated Vbat Max value in Table 3-1
 Updated section title, table title, and introductory text in Section 3.2
 Updated all Min values, the Vbat Typ value, and the VDD_1P8,
VDD_3P0, and V Max values, and added note 2. in Table 3-2
bat
 Updated Sleep 1.8 V I/O and Vbat values in Table 3-3
 Removed the Crx row, updated the Min and Typ values, and updated
the Units entries in Table 3-4
 Split previous Table 3-5 into two tables: Table 3-5 (and updated
Conditions column heading) and Table3-6 (and updated the High level
input voltage ITX value)
 Updated Min and Max values in Table 3-8
 Updated Phase noise/f = 100 KHz Max value in Table 3-10
 Chapter 4:
 Added QCA1990 rating to the MSL1 row Comments and replaced
TBDs with values in the paragraph following Table 4-4
 Updated all Typ values in the table and defined the previous TBD
value in footnote 2 in Table 4-5
 Defined values for previously TBD entries in the first bullet in Section 6.2.3
 Updated Chapter 7
80-Y0597-1 Rev. M MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION 3
Confidential and Proprietary – Qualcomm Atheros, Inc.
QCA1990 NFC Controller SoC Device Specification
Revision Date Description
H December 2013  Figure 1-1: Removed TP pin
 Table 1-2: Updated secure element interfaces
 Figure 2-1: Changed pin 7 to GND
 Table 2-7: Updated ground pins
 Table 3-3: Updated DC power consumption specifications
 Table 3-5: Updated TX_OUTP pin characteristics
 Table 3-6: Updated DC output resistance for TX_OUTP and TX_OUTM
(Tx initiator)
 Table 3-7: Updated DC output resistance for TX_OUTP and TX_OUTM
(Tx target)
 Table 3-10: Updated phase noise specifications
 Table 4-3: Updated QCA1990 device identification details
 Table 4-5: Updated TBD value in thermal resistance note
 Section 7.1: Added reliability results
J March 2014  Removed references to DCLB, since this feature is no longer supported in
QCA1990
 Updated Figure 1-1:
 Removed DCLB and NFC-WI
 Made corrections to power supply blocks
 Figure 2-1: Removed DCLB pin and replaced with NC
 Table 4-1: Removed DCLB
 Section 4.2: Updated part ordering information to reflect CS1 parts
K May 2014  Changed pin 20 name to PWR_REQ/GPIO_1 throughout document
 Updated pin type and pin functionality of pin 20 in Table 2-4
 Updated device identification details in Table 4-3
 Updated device ordering information in Section 4.2
L June 2014  Table 3-2, Operating conditions: Changed Vbat max operating voltage
to 4.5 V
 Table 3-3, DC power consumption: Updated current consumption
numbers for CS2
 Section 4.2, Device ordering information: Updated device ordering
information for CS2 and removed country designation from fabrication
code
 Section 7.1, Reliability qualifications summary: Updated reliability
information for CS2
M August 2014  Removed “(Advance Information)” from title and Table1-1, Primary
QCA1990 documentation
 Table2-4, Digital baseband pin descriptions: Removed reference to DCLB
 Table3-1, Absolute maximum ratings: Changed pin name to match
reference schematic
 Table3-2, Operating conditions: Changed pin name to match reference
schematic
 Table3-3, DC power consumption: Updated power consumption numbers
80-Y0597-1 Rev. M MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION 4
Confidential and Proprietary – Qualcomm Atheros, Inc.
Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.1 Documentation overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.2 QCA1990 SoC introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.3 QCAQCA1990 SoC features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
1.3.1 Summary of QCA1990 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
1.4 Terms and acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
1.5 Special marks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2 Pin Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.1 I/O parameter definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.2 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.2 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.3 DC power consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.4 RF pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.4.1 TX_OUTP and TX_OUTM pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . 23
3.4.2 DC output resistance for TX_OUTP and TX_OUTM (Tx initiator) . . . . . . . . 24
3.4.3 DC output resistance for TX_OUTP and TX_OUTM (Tx target) . . . . . . . . . . 24
3.5 I2C interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.6 Digital logic characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.7 Clock reference requirement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4 Mechanical Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.1 Part marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.1.1 Device marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.1.2 Device identification for each sample type . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
4.2 Device ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
4.3 Device moisture-sensitivity level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
4.4 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5 Carrier, Storage and Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.1 Carrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.1.1 Tape and reel information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
80-Y0597-1 Rev. M MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION 5
Confidential and Proprietary – Qualcomm Atheros, Inc.
QCA1990 NFC Controller SoC Device Specification Contents
5.2 Storage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.2.1 Storage conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.2.2 Out-of-bag duration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.3 Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.3.1 Baking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.3.2 Electrostatic discharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.4 Barcode label and packing for shipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
6 PCB Mounting Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
6.1 RoHS compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
6.2 SMT parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
6.2.1 Land pad and stencil design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
6.2.2 Reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
6.2.3 SMT peak package-body temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
6.2.4 SMT process verification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
7 Part Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
7.1 Reliability qualifications summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
7.2 Qualification sample description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
80-Y0597-1 Rev. M MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION 6
Confidential and Proprietary – Qualcomm Atheros, Inc.
QCA1990 NFC Controller SoC Device Specification Contents
Figures
Figure1-1 QCA1990 functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure2-1 QCA1990 pin assignments (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure4-1 30 WLNSP (2.12 × 2.17 × 0.55 mm) package outline drawing . . . . . . . . . . . . . . . . 28
Figure4-2 X, Y orientation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure4-3 QCA1990 part marking (top view - not to scale) . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure4-4 Device identification code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure5-1 Carrier tape drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure5-2 Tape orientation on the reel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure5-3 Part orientation in the tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure6-1 Area ratio (AR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure6-2 Acceptable solder-paste geometries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure6-3 QCA typical SMT reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
80-Y0597-1 Rev. M MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION 7
Confidential and Proprietary – Qualcomm Atheros, Inc.
QCA1990 NFC Controller SoC Device Specification Contents
Tables
Table1-1 Primary QCA1990 documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table1-2 QCA1990 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table1-3 Terms and acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table1-4 Special marks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table2-1 I/O description (pad characteristics) parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table2-2 RF Tx and Rx pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table2-3 Power management/XTAL pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table2-4 Digital baseband pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table2-5 No connect, do not connect, or reserved pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table2-6 Power pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table2-7 Ground pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table3-1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table3-2 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table3-3 DC power consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table3-4 RF pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table3-5 TX_OUTP pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table3-6 DC output resistance for TX_OUTP and TX_OUTM (Tx initiator) . . . . . . . . . . . . . 24
Table3-7 DC output resistance for TX_OUTP and TX_OUTM (Tx target) . . . . . . . . . . . . . . . 24
Table3-8 Digital logic characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table3-9 Drive strengths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table3-10 Clock reference requirement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table4-1 QCA1990 pin locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table4-2 Part marking line description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table4-3 QCA1990 device identification details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table4-4 MSL ratings summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table4-5 Device thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table6-1 QCA typical SMT reflow profile conditions (for reference only) . . . . . . . . . . . . . . . 39
Table7-1 QCA1990 silicon reliability results for TSMC-F12 die from assembly at ATT and
UTAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table7-2 QCA1990 package reliability results for TSMC-F12 die from assembly at ATT and
UTAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
80-Y0597-1 Rev. M MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION 8
Confidential and Proprietary – Qualcomm Atheros, Inc.
1 Introduction
1.1 Documentation overview
Technical information for the QCA1990 Near Field Communication (NFC) controller
system-on-chip (SoC) is primarily covered by the documents listed in Table1-1, and all of them
should be studied for a thorough understanding of the device and its applications. Released
QCA1990 documents are posted on the CDMATech Support Website
(https://support.cdmatech.com) and are available for download.
Table1-1 Primary QCA1990 documentation
Document
Title/description
number
80-Y0597-1 QCA1990 NFC Controller SoC Device Specification
(this document) Provides all QCA1990 electrical and mechanical specifications. Additional material
includes pin assignments, shipping, storage, and handling instructions, printed circuit
board (PCB) mounting guidelines, and part reliability. This document can be used by
company purchasing departments to facilitate procurement.
80-Y0597-4 QCA1990 NFC Controller SoC Device Revision Guide
Provides a history of QCA1990 device revisions. This document explains how to
identify the various device revisions, and discusses known issues (or bugs) for each
revision and how to work around them.
80-Y0597-5 QCA1990 NFC Controller SoC Design Guidelines/Training Slides
Provides detailed descriptions of all QCA1990 functions and interfaces, including its
various operating modes. Example applications are presented, and then specific
design topics such layout guidelines, power distribution recommendations, external
component recommendations, troubleshooting techniques, etc. are addressed.
80-Y0597-41 QCA1990 Design Example
80-Y0597-1 Rev. M MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION 9
Confidential and Proprietary – Qualcomm Atheros, Inc.
QCA1990 NFC Controller SoC Device Specification Introduction
This QCA1990 device specification is organized as follows:
Chapter1 Provides an overview of the QCA1990 documentation, gives a high-level functional
description of the device, lists the device features, and defines the terms and acronyms
used throughout this document.
Chapter2 Defines the device pin assignments.
Chapter3 Defines the device electrical performance specifications, including absolute maximum
and operating conditions.
Chapter4 Provides IC mechanical information, including dimensions, markings, ordering
information, moisture sensitivity, and thermal characteristics.
Chapter5 Discusses shipping, storage, and handling of the QCA1990 devices.
Chapter6 Presents procedures and specifications for mounting the QCA1990 onto PCBs.
Chapter7 Presents QCA1990 reliability data, including a definition of the qualification samples
and a summary of qualification test results.
1.2 QCA1990 SoC introduction
The QCA1990 device is a standalone NFC SoC with 40 nm CMOS technology. The QCA1990
device incorporates the radio, baseband, processor, and firmware necessary for short-range
wireless connectivity. The NFC controller interface (NCI) protocol is implemented over the I2C
interface to the host.
The QCA1990 device is intended for use in data transfers between devices (peer-to-peer mode
communication), to access digital content on the move (NFC reader/writer), and for mobile
payment and ticketing (card emulator). Its high integration and small wafer-level nano-scale
package (WLNSP) minimize the external components and the PCB area in design.
Two different operating regions are supported:
 Region 1
Battery level is normal (above phone critical shutdown voltage).

Host is powered up.

Full functionality of the near field communication controller (NFCC).

 Region 2
Battery voltage is low, but above the NFCC is critical.

Host is powered down.

Card emulator only, using a secure element connected to NFC controller directly (e.g., for

transit ticketing).
80-Y0597-1 Rev. M MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION 10
Confidential and Proprietary – Qualcomm Atheros, Inc.