4,006,466 United States Patent [19] [ll] Feb. 1, 1977 Patterson et al. [45] plurality of active modules, a plurality of passive mod [54] PROGRAMMABLE INTERFACE APPARATUS AND METHOD ules and at least one memory module and a system interface unit having a plurality of ports, each of which [75] Inventors: Garvin Wesley Patterson, Glendale; connect to a di?'erent one of the modules. Each module William A. Shelly, Phoenix; Jaime connects to one of the ports by a plurality of different Calle, Glendale; Earnest M. interfaces. The active modules include an input/output Monahan, Phoenix, all of Ariz. processing unit for processing interrupts and executing [73] Assignee: Honeywell Information Systems, command sequences and a multiplexer unit for directly controlling transfers between the memory module and Inc., Waltham, Mass. any one of the peripheral devices coupled to different [22] Filed: Mar. 26, 1975 ones of a plurality of ports of the multiplexer unit. Different ones of the modules of the system include the [211 Appl. No.: 562,364 programmable interface used for transferring com [52] US. Cl. .......................................... .. 340/1725 mand information to the multiplexer unit and to the devices associated therewith for enabling a different [51] Int. Cl.2 . . . . . . . . . . . . . . . . . . . . . . . . .. G06F 1/00 [58] Field of Search ............................... .. 340/1725 type of control to proceed in parallel with input/output data transfer operations. Each multiplexer unit in [56] References Cited cludes a plurality of storage registers which are opera UNITED STATES PATENTS tively coupled to the programmable interface asso ciated therewith for receiving control information 3,386,083 5/1968 Geller ct al. .................. it 340N725 therefrom designating the priority to be given by the 3,399,384 8/1968 Crockett ct al. ............. H IMO/172.5 unit to the processing of different types of interrupt 3,905,025 9/1975 Davis ct all ......... t. 340/1725 signals received from devices associated therewith in 3,925,766 12/1975 Bardotti ct all .............. .. 340/1725 addition to information designating which one of a set Primary Examiner—R. Stephen Dildine, Jr. of processing routines to be used in servicing the inter Attorney, Agent, or Firm-Faith F. Driscoll; Ronald T. rupt. Reiling [57] ABSTRACT 24 Claims, 31 Drawing Figures An input/output data processing system includes a 64K l 40 LOCAL MEMORY ‘ LOCAL MEMORY 1‘ 500 CONTROLLER 400 0A! s03 60' _A I ‘OP 1 PRINTER H __L§tf>__n7 1 l L LOW SPEED l "A l ' ' J MULTIPLEXER H I SYSTEM INTERFACE (MPXI 1 ; - UNIT H 1 : PAPER H H n- aG a , -1 MF .___ E v , A l‘ K 5021,I r @Rr 1 RETAADPEE R 1 l ( _____ 602 ; e00 ‘ . . . 1 BM 1 ‘52%| . 600 602 60l 600 __u — 1 l INPUT/OUTPUT , HOST HIGH SPEED MULTIPLEXER PROCESSOR i EEOC‘ v (MPX) HSMX | 1 CHAN 1 CHAN CHAN ‘ CHAN \ y 1 PORT o ‘ PORT 1 PORT 2 1 P RT 200 :00 300 ‘ i o 3 5V4 E/v5‘— ~ E 'EV‘'G7 H \ l% :/'30“0I- 1 l l > 1 1 CONTROLLER lADAPTER ,‘ADAPTER ‘ADAPTER of; 303,1‘ ADAPTER 1 1 C 2 3 \so /v y an 312/ 309 U.S. Patent Feb. 1, 1977 Sheet 6 of 16 4,006,466 LVL 501 INTERRUPT LEVEL NETWORK CA1 LVL/TYPE CAO'3 FAO-‘l CA2 LVL ITYPE (PORT/CHAN) 301-36 cm cournuu INTERRUPT 01 cm sum.’ “1'34 PARITY cao-s PRIORIW' 301-21 EXCPT & INTERRUPTS IR IDA REG. IHIO COMMON SECTION PTX-INIO -OO‘~O5 __ ______.__1 | PTX-IDAO0~11,P0,1 IF‘ig 4a (sheef 2 0f 2). US. Patent Feb. 1, 1977 Sheet 7 of 16 4,006,466 FROM-507a oTA(0o-35,P°'5) swncu g9; CAOSELEGT T0 0A2 acAa 302-20“ 3022 ' DRIVE cms ____J TO 5074 * GAO-DFA-OO-SS P0-5 Fm ! .- " bit-1222;: _ -' u ‘ W W A027 _ me I INTER FACE 502-15 FROM CAI I CONTROL _ ’ FARM moucao68 . - 00 _ 35 c HCKK/TGS E u 301-46 ‘ CHANNEL ADAPTER PORT SECTION (0A0) cAo-mA-oo-as, P0-5 CAO-DF--55, PM L (40) (40) A Fig. 4b. US. Patent Feb. 1, 1977 Sheet 8 Of 16 4,006,466 LACTIVE OUTPUT PORT REQ. /\ DA A TO IU SIU PORTS m S I! 1 ACTWE A-H DATA To s1u _ MODULES WENT I ACTIVE RED ACCEPTED . ACCEPT READ DATA I ‘lg-5Q (OMITTED ON PORTs 68H) ACCEPT PI COMMAND PI DATA FROM SIU sxu PORTS - A-F ‘ELLNIERFAEE: RE ADYW MODULES & J'L READ DATA xFER REO RDTR , 5b PI DATA TO SIU PDTSMO) 1:‘! . . .' l l QT; 11;” '_—""__ - g READ DATA ACCERTLD X RDAA \ W“ 60| PROGRAMMABLE INTERFACE LINTERRUPT REO H m IR SIU PORTS NTERRUPT DATA IDA (l4) MODULES A-F, G_.H "'"s??‘s’ax’ <""w::::_;’, ””""" ""—'" "_ ~. rue-p555“ a J_|_ MULTIPORT IDENT I VIM) (OMITTED ON PORTS OOH) LEvEL ZERO PRESENT LzP F HIGHER LEVEL INTERRUPT PRESENT HLIP lg- 5 C INTERRUPT DATA REQUEST \ IDR (OMITTED 0N RELEASE \ I RLS PORTS A-D aJ-L) INTERRUPT LEvEL \ / AILB) KINTERRDPT INTERFAE}E\GOZ TO MEM TO MEM SIU TO MEM LOCAL ACCEPT PI COMMAND LOCAL MEM PORTs ACCEPT zAC COMMAND MEM I INTERFACE READY zAC INTERFACE READY . EAD DATA XFER REO RDTR I—-I‘1g_ 5d, MEM DFM(40) INT FROM MEM 1 RlFMuo) DOUBLE PRECISION FROM MEM\ DPFM QUAD READ DATA ACCEPTED \ RDAA ‘435D SYSTEM CLOCK \ SYS-CLK A\ N603 LOCAL MEMORY INTERFACE U.S. Patent Feb. 1, 1977 Sheet 9 Of 16 4,006,466 FORMAT OF RDEX BI WREX INSTRUCTIONS O 9 I25 I4 1718 35 OP CODE (5R1 6R2 IMMEDIATE/DISPLACEMENT I Lg “*TTVTTTTT" ‘Tr-J \i" / //_Fm<g¥IDCEAsNABCEONsTANT INST OP CODE _ H WREX OR RDEX SEEgIFIES ONE OF GEN. MODIFIED ANOPTIONALJ _ LWWITH AN INDEX TO INDEX REGISTER DEFINE AN ADDRESSOFAREG OUTSIDE PROC. 2OO / FORMAT OF PI COMMAND COMMAND wORD 012345 89 l5|6 26272829 35/ R/ CHAN / / > C ADDREss/ PI w R PN # // CONTROL 0P A FUNCTION WXW'w-J ¥—-Y\—J \———,-——~J-J~YA—-?r~—-J P1“ \ OOxx=CA PORTO ADDREss OF REG TO 1=WREXL O1XX=CA PQRT1 BE READ/LOADED O=RDEX 1OXX=CA PORT 2 WHERE 27=O. PRIvILEOE, 11 xx =CA PORT 3 ADDRESS =0018 FOR MODE=I (FROM PSR BITS é??cc?glfgs BE Fig, 7Q< $28M =BOTt R '" II i EXECUTED IN CASE OF ' ' USED IN CONJUNCTION 1 LOAD CONTROL WITH A LOAD CONTROL-- COMMAND (Le. 2701) COMMAND (Fig 7b) CAC=1=CA COMMAND 1,2T=OO=READ REG. 1,27=Ol=NOT USED . 1, 27=10= LOAD REG. 1,27=11= LOAD CONTROL CAC = O = HSMX COMMAND 2 I m 5,6 IIi2l4l5l7l8202l232426272930323335 / ICBD LTO LTI LT2 LT3 LT4 LT5 LT6 LT? \DATA \ \_____Y_____/ L v wORD INT CONTROL LTO=LEvEL FOR INTERRuPT O BLOCK DISPLACEMENT LTI =LEvEL FOR INTERRUPT 1 LT 2= LEVEL FOR INTERRUPT. 2 L'T7=LI-:vEL FOR INTERRDPT'? f FORMAT OF LOAD CONTROL PI COMMAND coMwglég O 3 5 8 ISI? I8 |9202| 22 l1252s2'z2sM3I323334s5 I I R P 0'34“ I 0 SET Fr ' 7b PS IAIIIHIBE'I ~—~~—~ l . . ' SET g < REsET lNHlB|T____”_____ CLEAR CA PARITY GEN. _ RESET ADVANCE LPW - ---- -- CLEAR CA RESET DCw INT. ~~—--— STEP CA RESET EXCEP. INT, —-——~——— RESET PROG, INT --_--~I»~-—-~- LOAD P“
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