Precision Instrumentation Amplifiers and Read-Out Integrated Circuits

198 Pages·2013·6.07 MB·English

by  Kofi A. A. Makinwa (auth.), Rong Wu, Johan H. Huijsing

Analog Circuits and Signal Processing
Series Editors
Mohammed Ismail
Mohamad Sawan
For further volumes:
http://www.springer.com/series/7381
Rong Wu
Johan H. Huijsing
Kofi A. A. Makinwa
Precision Instrumentation
Amplifiers and Read-Out
Integrated Circuits
123
Rong Wu Kofi A. A. Makinwa
e-mail:
To my parents and Zhiyu
Preface
Sensors are ubiquitous in our lives and indispensable in many applications, e.g.,
process control, weighing scales, environmental monitoring, and temperature
measurement. They can be found in wafer steppers, weighing scales, mobile
phones and automobiles, etc. While these sensors convert the physical signals into
electrical domain, their output voltage are small, in the millivolt-level, such as
thermocouples and bridge transducers (thermistor bridges, Hall sensors and load
cells). Therefore, they need amplifiers to boost such signals to levels compatible
with the input ranges of typical Analog-to-Digital Converters (ADCs). To achieve
sufficient signal-to-noise ratio, the input referred error of the amplifier should be
reduced to a low enough level that means the amplifier must have low thermal and
1/f noise, high accuracy, and low drift. Achieving all these is quite challenging in
today’s mainstream CMOS technology whose inherent precision is limited by
1/f noise, component mismatch, gain error, and drift. A further challenge is to
achieve good power efficiency since many sensor systems are battery-powered.
This is also essential for precision temperature measurement to restrict local self-
heating errors.
This book describes the use of power-efficient techniques to mitigate low fre-
quency errors, resulting in interface electronics with high accuracy, low noise, and
low drift. Since this book is mainly about techniques for eliminating low frequency
errors, it describes the nature of these errors and the associated dynamic offset
cancelation techniques used to mitigate them. It then shows how these techniques
can be applied to operational amplifiers. Then these techniques are extended to
current-feedback instrumentation amplifiers (CFIAs) which are well suited for
bridge readout. Since the main disadvantage of CFIAs is their limited gain
accuracy, the available techniques to improve this are discussed, such as resistor-
degeneration, dynamic element matching, etc. The advantages and disadvantages
of each of these techniques are analyzed.
Later, it presents the architecture design and implementation of a CFIA, in
which a new technique (offset reduction loop) is proposed to suppress the chopper
vii
viii Preface
ripple without causing noise folding. An improved version CFIA of the first CFIA
is described, which maintains the noise performance of the first design and also
achieves high gain accuracy without trimming. This is obtained by dynamic
element matching and another proposed new technique (gain error reduction loop).
The basic architecture of the first CFIA is then combined with an ADC to build
a readout IC. The system-level design of the readout IC together with imple-
mentation details and measurement results are presented. The CFIA and the ADC
collaborate at system level to achieve an optimum performance. Measurement
results show that the realized readout IC achieves state-of-the-art offset and drift
performance.
Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Overview of Read-Out Electronics for Sensors . . . . . . . . . . . . . 3
1.3 Instrumentation Amplifier Topologies . . . . . . . . . . . . . . . . . . . 5
1.3.1 Three-Opamp Topology . . . . . . . . . . . . . . . . . . . . . . . . 5
1.3.2 Switched-Capacitor Topology. . . . . . . . . . . . . . . . . . . . 5
1.3.3 Capacitively-Coupled Topology . . . . . . . . . . . . . . . . . . 6
1.3.4 Current-Mode Topology. . . . . . . . . . . . . . . . . . . . . . . . 8
1.3.5 Current-Feedback Topology . . . . . . . . . . . . . . . . . . . . . 8
1.4 Current-Feedback Instrumentation Amplifier. . . . . . . . . . . . . . . 9
1.5 Read-Out ICs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.6 Targeted Sensor Applications and Challenges . . . . . . . . . . . . . . 14
1.7 Organization of the Thesis . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2 Dynamic Offset Cancellation Techniques
for Operational Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.2 Low Frequency Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.2.1 Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.2.2 1/f Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.2.3 Drift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2.3 Dynamic Offset Cancellation Techniques . . . . . . . . . . . . . . . . . 23
2.3.1 Auto-Zeroing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2.3.2 Chopping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
2.3.3 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.4 Charge Injection Compensation Techniques
in Auto-Zeroed and Chopper Amplifiers. . . . . . . . . . . . . . . . . . 30
2.4.1 Compensation Techniques for Charge Injection . . . . . . . 30
ix
x Contents
2.4.2 Charge Injection and Clock Feed-Through
in Chopper Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . 31
2.4.3 Chopper Charge Injection Suppression Techniques . . . . . 35
2.4.4 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.5 Dynamic Offset Compensated Operational Amplifiers . . . . . . . . 37
2.5.1 Feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
2.5.2 Ping-Pong Operational Amplifier . . . . . . . . . . . . . . . . . 38
2.5.3 Chopper-CDS Operational Amplifier . . . . . . . . . . . . . . . 40
2.5.4 Offset-Stabilized Operational Amplifiers . . . . . . . . . . . . 41
2.5.5 Chopper Offset-Stabilized Operational Amplifiers. . . . . . 42
2.6 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
3 Current-Feedback Instrumentation Amplifiers and Gain Accuracy
Improvement Techniques . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
3.1 Current-Feedback Instrumentation Amplifier. . . . . . . . . . . . . . . 51
3.1.1 Indirect Current-Feedback Instrumentation Amplifier . . . 52
3.1.2 Direct Current-Feedback Instrumentation Amplifier . . . . 53
3.2 Precision Current-Feedback Instrumentation Amplifiers . . . . . . . 54
3.2.1 Chopper-Stabilized Current-Feedback
Instrumentation Amplifier . . . . . . . . . . . . . . . . . . . . . . 55
3.2.2 Ping-Pong Auto-Zeroed Current-Feedback
Instrumentation Amplifier . . . . . . . . . . . . . . . . . . . . . . 56
3.2.3 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
3.3 Gain Accuracy Improvement Techniques . . . . . . . . . . . . . . . . . 58
3.3.1 Current-Feedback Instrumentation Amplifier with
Resistor-Degenerated Input Stages . . . . . . . . . . . . . . . . 59
3.3.2 Chopper-Stabilized Current-Feedback Instrumentation
Amplifier with Auto-Gain Calibration . . . . . . . . . . . . . . 61
3.3.3 Ping-Pong-Pang Current-Feedback Instrumentation
Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
3.3.4 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
4 A Chopper Instrumentation Amplifier with Offset
Reduction Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
4.1 Amplifier Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
4.2 Amplifier Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
4.3 Offset Reduction Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
4.3.1 Basic Concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
4.3.2 Transfer Function Analysis. . . . . . . . . . . . . . . . . . . . . . 77
4.4 Other Sources of Chopper Ripple . . . . . . . . . . . . . . . . . . . . . . 81
4.4.1 Cascode Buffer Isolation . . . . . . . . . . . . . . . . . . . . . . . 81
4.4.2 Chopper Ripple from the Intermediate Stage . . . . . . . . . 83
Contents xi
4.5 Applying ORL to General Purpose Instrumentation
Amplifiers and Operational Amplifiers. . . . . . . . . . . . . . . . . . . 84
4.6 Circuit Implementations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
4.6.1 The Input Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
4.6.2 The Intermediate and Output Stages . . . . . . . . . . . . . . . 90
4.6.3 The Cascode Buffers . . . . . . . . . . . . . . . . . . . . . . . . . . 91
4.6.4 Constant-Gm Bias Circuit . . . . . . . . . . . . . . . . . . . . . . . 93
4.6.5 Chopper Clock Design and Layout . . . . . . . . . . . . . . . . 94
4.7 Measurement Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
4.8 Benchmark and Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . 102
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
5 A Chopper Instrumentation Amplifier with Gain Error
Reduction Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
5.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
5.2 Dynamic Element Matching . . . . . . . . . . . . . . . . . . . . . . . . . . 108
5.3 Analog Gain Error Reduction Loop . . . . . . . . . . . . . . . . . . . . . 109
5.3.1 Basic Concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
5.3.2 Qualitative Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . 110
5.3.3 Quantitative Analysis. . . . . . . . . . . . . . . . . . . . . . . . . . 110
5.4 Digitally-Assisted Gain Error Reduction Loop . . . . . . . . . . . . . 114
5.5 Comparison Between ORL and GERL . . . . . . . . . . . . . . . . . . . 116
5.6 The Effects of Chopping, DEM and GERL
on CFIA Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
5.7 Circuit Implementations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
5.7.1 Current-Feedback Instrumentation Amplifier
with Analog Gain Error Reduction Loop . . . . . . . . . . . . 118
5.7.2 Current-Feedback Instrumentation Amplifier
with Digitally-Assisted Gain Error Reduction Loop. . . . . 124
5.8 Measurement Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
5.8.1 Noise. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
5.8.2 Output Ripple Measurement . . . . . . . . . . . . . . . . . . . . . 128
5.8.3 INL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
5.8.4 Gain Accuracy and Gain Drift . . . . . . . . . . . . . . . . . . . 131
5.8.5 Settling Behavior of Analog GERL
and Digitally-Assisted GERL . . . . . . . . . . . . . . . . . . . . 133
5.9 Benchmark and Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . 135
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
6 Read-Out Integrated Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
6.1 ADC Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
6.2 Architecture Design of the ADC . . . . . . . . . . . . . . . . . . . . . . . 140
6.2.1 Modulator Topology . . . . . . . . . . . . . . . . . . . . . . . . . . 140
6.2.2 Non-Idealities in the DR Modulator . . . . . . . . . . . . . . . 145
xii Contents
6.3 Gain Accuracy Improvement Techniques in the Read-Out IC . . . 151
6.3.1 Dynamic Element Matching . . . . . . . . . . . . . . . . . . . . . 151
6.3.2 Digitally-Assisted Gain Error Correction Scheme . . . . . . 153
6.4 Offset and 1/f Noise Suppression Techniques
in the Read-Out IC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
6.4.1 Previous Approach
(Multi-Stage Chopping and System-Level Chopping) . . . 155
6.4.2 Proposed Approach (Input-Stage Chopping
Combined with System-Level Chopping) . . . . . . . . . . . . 156
6.5 Error Correction Techniques Summary. . . . . . . . . . . . . . . . . . . 159
6.6 Circuit Implementations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
6.6.1 CFIA Implementation . . . . . . . . . . . . . . . . . . . . . . . . . 159
6.6.2 ADC Implementation. . . . . . . . . . . . . . . . . . . . . . . . . . 163
6.7 Measurement Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168
6.8 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
7 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179
7.1 Original Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179
7.2 Chapter 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179
7.3 Chapter 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180
7.4 Chapter 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180
7.5 Main Findings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181
7.6 Other Applications of this Work . . . . . . . . . . . . . . . . . . . . . . . 181
7.7 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182
Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183
About the Author . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189
Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191