Practical Synthesis of High-Performance Analog Circuits

307 Pages·1998·7.98 MB·English

by  Emil S. Ochotta

PRACTICAL SYNTHESIS OF
HIGH-PERFORMANCE
ANALOG CIRCUITS
PRACTICAL SYNTHESIS OF
HIGH-PERFORMANCE
ANALOG CIRCUITS
by
Emil S. Ochotta
Xilinx, San Jose
Tamal Mukherjee
Carnegie Mellon University
Rob A. Rutenbar
Carnegie Mellon University
L. Richard Carley
Carnegie Mellon University
~.
"
SPRINGER SCIENCE+BUSINESS MEDIA, LLC
Library of Congress Cataloging-in-Publication Data
A C.I.P. Catalogue record for this book is available
from the Library of Congress.
ISBN 978-1-4613-7545-6 ISBN 978-1-4615-5565-0 (eBook)
DOI 10.1007/978-1-4615-5565-0
Copyright © 1998 by Springer Science+Business Media New York
Originally published by Kluwer Academic Publishers in 1998
Softcover reprint of the hardcover 1st edition 1998
AII rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted in any form or by any means, mechanical, photo
copying, recording, or otherwise, without the prior written permission of the
publisher, Springer Science+Business Media, LLC.
Printed an acid-free paper.
For Irene, Nicholas, andfor Bin -ESO
Contents
Contents ........................................................................... vii
L" t f F" """
IS 0 Igures •.••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••• XIII
List of Tables ............................................................... xix
P re f:a ce ........................................................................... """
XXIII
1 Introduction ................................................................... 1
1.1 Focus .............................................................................................................. 1
1.2 Motivation ...................................................................................................... 2
1.3 The Mixed-Signal Design Process ................................................................. 3
1.4 Goals of Analog Design Automation ............................................................. 7
1.5 Research Direction ....................................................................................... 10
1.6 A New Nominal Synthesis Approach .......................................................... 11
1.7 Preview of Nominal Synthesis Results ........................................................ 17
1.8 A New Unified Synthesis Formulation ........................................................ 19
PRACTICAL SYNTHESIS OF HIGH-PERFORMANCE ANALOG CIRCUITS
1.9 Preview of Variation-Tolerant Synthesis Results ........................................ 21
1.10 Book Organization ....................................................................................... 23
2 Methods for Nominal Analog Circuit Synthesis ....... 25
2.1 Layout-Based Design Automation ............................................................... 25
2.2 Artificial Intelligence Approaches to Design Automation ........................... 27
2.3 Simulation-Based Optimization ................................................................... 27
2.3.1 Formulating Analog Design As A Numerical Optimization Problem .............. 28
2.3.2 Case Study: DELIGHT.SPICE ......................................................................... 30
2.3.3 From Optimization to Synthesis ...................................................................... .31
2.4 Equation-Based Synthesis ........................................................................... .32
2.4.1 A Generalized Modelfor An Equation-Based Synthesis System ..................... .34
2.4.2 Case Study: OPASYN. ...................................................................................... .35
2.4.3 Case Study: OASYS ......................................................................................... .37
2.4.4 Case Study: IDAC ........................................................................................... .39
2.4.5 Case Study: ARIADNE .................................................................................... .41
2.4.6 Case Study: STAIC .......................................................................................... .43
2.4.7 Case Study: ISAID ........................................................................................... .44
2.4.8 Case Study: Maulik ......................................................................................... .45
2.5 Comparison of Previous Systems ................................................................ .46
2.5.1 Accuracy .......................................................................................................... .46
2.5.2 Run-time ........................................................................................................... 49
2.5.3 Preparatory Effort ............................................................................................ 49
2.5.4 Generality/Complexity ..................................................................................... 50
2.5.5 Openness .......................................................................................................... 50
2.6 Where Equation-Based Tools Need to Improve ......................................... .51
2.7 Summary .....•................................................................................................ 52
3 A New Nominal Synthesis Strategy ........................... 53
3.1 Goals ............................................................................................................. 53
3.2 Strategy ........................................................................................................ .55
3.2.1 Asymptotic Waveform Evaluation ................................................................... .55
3.2.2 Fully Automatic Synthesis Using an Optimization Formulation ...................... 56
3.2.3 Simulated Annealing. .................•...................................................................... 57
3.2.4 A Library of Encapsulated Device Models ...................................................... 61
viii
CONTENTS
3.2.5 Reformulating the Synthesis Problem .............................................................. 62
3.3 Architecture .................................................................................................. 63
3.3.1 Analysis and Code Generation ......................................................................... 64
3.3.2 Solution ............................................................................................................. 64
3.4 A Design Scenario ........................................................................................ 65
3.4.1 The Circuit Design Problem ............................................................................ 65
3.4.2 Mapping the Synthesis Problem Into An Optimization Problem .................... .72
3.4.3 Solving the Optimization Problem .................................................................. .76
3.5 Revisiting Unresolved Issues ....................................................................... 76
3.6 Summary ...................................................................................................... 78
4 Synthesis Via Annealing ............................................. 81
4.1 Overview of Simulated Annealing ............................................................... 81
4.2 Problem Representation ............................................................................... 84
4.3 Move Generation .......................................................................................... 87
4.4 Cost Function ............................................................................................... 93
4.4.1 Objective Terms ................................................................................................ 93
4.4.2 Constraint Terms .............................................................................................. 95
4.4.3 Numerical Robustness Terms ........................................................................... 95
4.4.4 Region of Operation Terms .............................................................................. 96
4.4.5 Operating Point Terms ..................................................................................... 97
4.4.6 Calculation o/the Cost Function ................................................................... 100
4.4.7 Overview ofA WE ........................................................................................... 101
4.4.8 Computing Performance Metrics with AWE. ................................................. 105
4.5 Annealing Control Mechanisms ................................................................. 107
4.5.1 Cooling Schedule ............................................................................................ 107
4.5.2 Dynamic Weights ............................................................................................ 111
4.6 Implementation Details .............................................................................. 115
4.7 Summary .................................................................................................... 117
5 A Circuit Compiler ................................................... 119
5.1 Required Input ............................................................................................ 119
5.1.1 Constants, Functions and Expressions ........................................................... 124
5.1.2 Look and Format of the Input Description. .................................................... 126
5.1.3 Input Description for the Design Example ..................................................... 128
ix
PRACTICAL SYNTHESIS OF HIGH·PERFORMANCE ANALOG CIRCUITS
5.2 Analysis ...................................................................................................... 128
5.2.1 Building a Linearized Equivalent Circuit ...................................................... 130
5.2.2 Determining the Node-Voltage Variables ...................................................... 131
5.2.3 Ensuring That All Element Values Can Be Computed ................................... 134
5.2.4 Determining Equationsfor the Current in Each Branch ............................... 134
5.2.5 Writing Device Operating Region Constraints .............................................. 135
5.2.6 Generating C Strings to Evaluate the Specifications ..................................... 135
5.3 Code Generation ......................................................................................... 136
5.4 Implementation ........................................................................................... 136
5.5 Summary .................................................................................................... 137
6 Nominal Circuit Synthesis Results .......................... 139
6.1 Previously Published Synthesis Results ..................................................... 140
6.1.1 Circuit Descriptions ....................................................................................... 141
6.1.2 Synthesis Results ............................................................................................ 150
6.1.3 Comparing Automation and Accuracy ........................................................... 151
6.2 Device Encapsulation ................................................................................. 156
6.3 Design Space Exploration .......................................................................... 158
6.4 Comparison with Manual Design ............................................................... 160
6.5 Designing Large, Realistic Cells ................................................................ 163
6.5.1 The Effect ofA dditional Variables/Constraints on Run-Time. ....................... 165
6.6 Summary .................................................................................................... 170
7 Validating the Tool Design ....................................... 171
7.1 Reducing the Need for User-Controlled Constants .................................... 171
7.2 The Lam Cooling Schedule ........................................................................ 182
7.3 Dynamic Move Selection ........................................................................... 184
7.4 Dynamic Weighting ................................................................................... 186
7.5 The Relaxed-D.C. Formulation .................................................................. 187
7.6 The Annealing Process: Cost Function Evolution ..................................... 188
7.7 Summary .................................................................................................... 190
x
CONTENTS
8 The Second Challenge: Handling Variations ......... 191
8.1 Problems with Variations in Nominal Synthesis ........................................ 192
8.1.1 Operating Range Failure ............................................................................... 192
8.1.2 Poor Yield Due to Manufacturing Variations ................................................ 195
8.2 Parametric Yield Maximization ................................................................. 198
8.3 Summary .................................................................................................... 202
9 A Unified Form.ulation .............................................. 203
9.1 Problem Formulation Goals ....................................................................... 203
9.2 Strategy ....................................................................................................... 205
9.3 Notation and Formulation .......................................................................... 206
9.3.1 Complete Formulation ................................................................................ ,. . 207
9.4 Example ...................................................................................................... 208
9.4.1 Circuit Specifications ..................................................................................... 210
9.4.2 Operating Point Variations ............................................................................ 212
9.4.3 Variations Related to Manufacturing Fluctuations ....................................... 213
9.5 Comparison with Previous Formulations ................................................... 216
9.6 Summary .................................................................................................... 218
10 Solving the Infinite Program .................................. 219
10.1 Literature Review ....................................................................................... 219
10.1.lA Conceptual Algorithm ................................................................................ 221
10.2 Our Solution Approach .............................................................................. 225
10.2.1Basic Approach .............................................................................................. 225
10.2.20uter Optimization ........................................................................................ 227
10. 2. 31nner Optimization ......................................................................................... 228
10.2.4Sequence of 1nner and Outer Optimizations .................................................. 230
10.3 Local and Global Optimization Methods ................................................... 231
10.4 Annealing in Annealing Implementation ................................................... 232
10.4.1Monotonicity in 1nner Optimization .............................................................. .233
10.4.2Constraint Pruning ........................................................................................ 234
10.5 Synthetic Example ...................................................................................... 235
10.6 Summary .................................................................................................... 238
xi
PRACTICAL SYNTHESIS OF HIGH-PERFORMANCE ANALOG CIRCUITS
11 Variation-Tolerant Synthesis Results .................... 239
11.1 Simple OTA Circuit ................................................................................... 240
11.2 Folded Cascode Amplifier ......................................................................... 242
11.3 Manufacturing Line Variations .................................................................. 244
11.4 Band-Gap Reference Circuit ...................................................................... 249
11.5 Summary .................................................................................................... 252
12 Conclusions and Future Work ............................... 253
12.1 Introduction ................................................................................................ 253
12.2 Contributions .............................................................................................. 253
12.3 Future Work ............................................................................................... 256
Bibliography ................................................................ 259
Index ............................................................................. 283
xii