Phase-Locked Loops for Wireless Communications: Digital and Analog Implementation

381 Pages·1998·8.93 MB·English

by  Donald R. Stephens (auth.)

PHASE-LOCKED LOOPS
FOR WIRELESS
COMMUNICATIONS
Digital and Analog Implementation
PHASE-LOCKED LOOPS
FOR WIRELESS
COMMUNICATIONS
Digital and Analog Implementation
by
Donald R. Stephens
~.
"
Springer Science+B usiness Media, LLC
Library of Congress Cataloging-in-Publication Data
Stephens, Donald R.
Phase-Iocked loops for wireless communications digital and
analog implementation / by Donald R. Stephens.
p. cm.
IncIudes bibliographical references and index.
ISBN 978-1-4613-7618-7 ISBN 978-1-4615-5717-3 (eBook)
DOI 10.1007/978-1-4615-5717-3
1. Phase-locked loops. 2. Wireless communication systems-
-Equipment and supplies. 3. Radio circuits. 1. Title.
TK7872.P38S75 1998
621 .3815 '364--dc21 98-20256
CIP
Copyright ® 1998 Springer Science+Business Media New York.
Originally published by Kluwer Academic Publishers in 1998
AII rights reserved. No part ofthis publication may be reproduced, stored in a
retrieval system or transmitted in any form or by any means, mechanical, photo
copying, recording, or otherwise, without the prior written permission of the
publisher, Springer Science+Business Media, LLC.
Printed on acid-free paper.
This book could not have been completed without
the loving support of my family. Many thanks to
Tracy, Andrew, and John
Contents
PREFACE X111
1 THE EARLY HISTORY OF PHASE-LOCKED Loops 1
1.1 History 1
1.2 References 6
2 ANALOG PHASE-LOCKED Loops 9
2.1 Time Domain Analysis of Phase-Locked Loops 9
2.2 Frequency Domain Analysis of Phase-Locked Loops 17
2.3 Partial Fraction Expansion 19
2.4 First Order Loop Responses 25
2.5 Definition of Loop Order 27
2.6 Second Order Phase-Locked Loops 27
2.7 Third Order Phase-Locked Loops 40
2.8 References 47
2.9 Problems 48
viii Contents
3 ROOT Locus AND FREQUENCY ANALYSIS 51
3.1 Root Locus 51
3.2 Frequency Analysis 61
3.3 FM Demodulator 69
3.4 Noise Bandwidth 77
3.5 Third Order Phase-Locked Loop Design 84
3.6 References 95
3.7 Problems 96
4 ACQUISITION AND TRACKING 101
4.1 First Order Acquisition 101
4.2 Second Order Loop Acquisition 105
4.3 Acquisition in Noise 114
4.4 Frequency Sweeping 118
4.5 Acquisition Summary 120
4.6 Summary of Analog Phase-Locked Loop Design Equations 122
4.7 References 124
4.8 Problems 125
5 DIGITAL TRANSFORMS 127
5.1 The Pulse Transform 127
5.2 ZTransform 133
5.3 Inverse Z-Transform 138
5.4 Partial Fraction Expansion 140
5.5 Synthetic Division 142
5.6 Modified Z-Transform 145
5.7 Zero Order Hold 148
5.8 References 150
5.9 Problems 151
Phase-Locked Loops for Wireless Communications ix
6 DIGITAL CLOSED Loop ANALYSIS 153
6.1 Loops With Samplers 153
6.2 Multirate Sampling 160
6.3 References 179
6.4 Problems 180
7 DIGITAL TRANSFORMATIONS OF ANALOG
PHASE-LOCKED Loops 183
7.1 Analog Loop Transformations 184
7.2 All Digital Loops With Block Elements 197
7.3 Loop Filter Transformations 198
7.4 VCOs 200
7.5 Complete Digital PLL Equations 203
7.6 References 211
7.7 Problems 211
8 STABILITY AND FREQUENCY RESPONSE OF DIGITAL Loops 215
8.1 Stability 215
8.2 Noise Bandwidth of Digital Phase-Locked Loops 227
8.3 Sampling Rate Effect Upon Loop Bandwidth 234
8.4 References 235
8.5 Problems 236
9 ALL DIGITAL PHASE-LOCKED Loops 239
9.1 Non-Uniform Sampling 239
9.2 Noise Analysis of the Second Order Loop 248
9.3 Noise Bandwidth of First Order Loops 252
9.4 Components of Digital Phase-Locked Loops 254
9.5 Phase Detectors 257
x Contents
9.6 References 266
9.7 Problems 267
10 DIGITAL PLL RESPONSES AND ACQUISITION 271
10.1 Linearized Input Responses 271
10.2 Nonlinear Analysis 279
10.3 Phase Plane Analysis 285
10.4 Phase Error Variance 287
10.5 Probability of Acquisition 291
10.6 Probability of Cycle Slip 293
10.7 Nonlinear Analysis of Second Order Loops 295
10.8 Acquisition for Non-Uniform Sampling 299
Phase-Locked Loops
10.9 References 301
10.10 Problems 302
11 SYNCHRONIZERS FOR DIGITAL COMMUNICATIONS 305
11.1 The Synchronization Problem 305
11.2 BPSK and QPSK Synchronization 312
11.3 Lock Detectors 320
11.4 Costas Loops 323
11.5 Timing Synchronizers 325
11.6 Interpolators 339
11. 7 References 343
11.8 Problems 346
12 PHASE NOISE ANALYSIS 349
12.1 Introduction to Phase Noise 349
12.2 Phase Noise in Phase-Locked Loops 353
Phase-Locked Loops for Wireless Communications xi
12.3 Phase Noise of Oscillators 357
12.4 Phase Noise of Dividers 360
12.5 Consequences of Phase Noise 363
12.6 Phase Noise Measurements 364
12.7 References 366
12.8 Problems 368
ApPENDIX A LAPLACE TRANSFORMS 371
ApPENDIX B Z TRANSFORMS 373
INDEX 375
Preface
This book is intended for the graduate or advanced undergraduate
engineer. The primary motivation for writing the text was to present a
complete tutorial of phase-locked loops with a consistent notation. As such,
it can serve as a textbook in formal classroom instruction, or as a self-study
guide for the practicing engineer.
A former colleague, Kevin Kreitzer, had suggested that I write a text,
with an emphasis on digital phase-locked loops. As modem designers, we
were continually receiving requests from other engineers asking for a
definitive reference on digital phase-locked loops. There are several good
papers in the literature, but there was not a good textbook for either
classroom or self-paced study. From my own experience in designing low
phase noise synthesizers, I also knew that third-order analog loop design
was omitted from most texts. With those requirements, the material in the
text seemed to flow naturally.
Chapter 1 is the early history of phase-locked loops. I believe that
historical knowledge can provide insight to the development and progress
of a field, and phase-locked loops are no exception. As discussed in
Chapter 1, consumer electronics (color television) prompted a rapid growth
in phase-locked loop theory and applications, much like the wireless
communications growth today.