Op Amp Conventional Topologies

61 Pages·2017·3.36 MB·English

ECEN 607 (ESS)
Texas A&M University
Edgar Sánchez-Sinencio
TI J. Kilby Chair Professor
1
Next we review the conventional Op Amp Design
frequency response compensation techniques
and also we introduced a simple LV Current-
Mode based Op Amp using resistors as
transconductors. Difference Differential
Amplifiers are also introduced.
2
U CMOS O A
NCOMPENSATED PERATIONAL MPLIFIER
V
DD
M3 M4
1
M6
C v
p1 2 o1 Node 3 is a low impedance
V M1 M2 High M8
in V C v
in Impedance p2 3 o
C
M7
M5 L
V M9
bs
V A ~1
SS V3
M1=M2; M3=M4
Ignoring zeros we can model this topology as:
Vin + Input io1 1 Second io2 2 Output 3 v
Stage Stage o
Vin - Ro1 Cp1 Ro2 Cp2 Stage Ro3 CL
g  g g  g g  g
A 0  m1 ; A 0  m6 ;   o2 04 ;   o6 o7
V1 g  g V2 g  g p1 C p2 C
o1 o3 o6 o7 p1 p2
     
A 0 A 0 A 0 g
A s  V1 V2 V3 ;   m8
   
VT 1 s  1 s  1 s  p3 C
p1 p2 p3 L 3
3
UNCOMPENSATED CMOS OPERATIONAL AMPLIFIER STABILITY
ISSUES
• The low frequency voltage gain is high enough for a number of
applications.
• The open loop poles are far from the origin, this can cause stability
problems for closed loop applications.
• Closed loop poles might end very close to the jw axis and some in
the RHP.
• How to tackle this stability problem will be discussed next.
4
Two-Stage Uncompensated Amplifier
V
DD
M M
3 4
M
6
I I
o o
2 2 I
M M 6
 1 2 
v v I
in
in g
V
out
I
I
o
7
M
7
M
5
V
SS
Uncompensated Operational Amplifier
g g
m2 m6 Large voltage gain
 A  A A 
V V1 V2
g  g g  g
02 04 06 07
 Poles are close to the j axis causing stability problems
5
5
Employing a simple capacitor will split correctly the poles but will generate a
Zero in the RHP.
Using an RC compensation can eliminate the zero and split poles. The resistor
can be implemented with transistor in the ohmic region.
V
DD
M M M
3 4 8
A
M
6
M
1
V
v M1 M2 0 out
in M
C 11 B
C
M
9
M
5 M
v 7
bias
V
SS
Improved internally compensated CMOS operational
amplifier. Better bias for the output stage (M8 and M9)
6
6
Analog and Mixed Signal Center, TAMU (ESS)
A variation at the output stage with class – AB is shown below
.
V
DD
 -
v
M M DS v
3 4 4
GS
 6
+ I
M 6
9
+
I I M
o o
v 6
2 2 GS9
 I
v  M L
in M v 8
M
1 2 in C C
C L
I
10
I
o
M
7
+
v
V
GS
bias M M - 7
5
10
V
SS
CMOS op-amp with class-AB output stage and RC pole splitting
.
7
7
“Pole Splitting” can be carried out with a compensation capacitor
feedback and a voltage buffer as shown below
M3 M4 M8
M10 M12
I Out
bias
  C
v M1 M2 v C
in in
M7
M6 M9
M5 M11
Two-Stage amplifier with source follower compensation scheme
• Without M12 and M11 a zero in the PRH
• With buffer (voltage follower), zero is eliminated and pole splitting
8
(due to C ) is kept.
8
C
An Improved Frequency Compensation
Technique for CMOS Operational Amplifiers
using Current Buffers
ECEN 607 (ESS)
Courtesy of Hatem Osman
Background.-
Two-Stage Op-amp with Miller compensation
• The first stage is a differential-input/single-ended output stage, and
the second stage is a class A or class AB inverting output stage.
C
c
• DC Gain
V
IN,p
g V
m1 OUT
V g
IN,n m2
r C r C
o1 p o2 L
• Transfer Function
• Pole/zero locations
RHP zero
Dominant Pole
Non-dominant Pole