Nombre del alumno - TFG - year

129 Pages·2012·1.52 MB·English

Universidad Carlos III de Madrid
Escuela Polite´cnica Superior
Electronic Technology Department
BACHELOR'S DEGREE IN TELECOMMUNICATION
TECHNOLOGIES
Final Degree Project
Implementation and Study of a
True Random Number
Generator
Author: Elena Mart´ınez Lo´pez
Tutor: Honorio Mart´ın Gonza´lez
Legan´es, September 2015
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Title: Implementation and Study of a True Random Number
Generator
Autor: Elena Mart´ınez Lo´pez
Tutor: Honorio Mart´ın Gonza´lez
THE TRIBUNAL
President: Ignacio Soto Campos
Vocal: Pablo Acedo Gallardo
Secretary: Jose Luis Gonza´lez de Suso Molinero
Substitute: Pedro Mart´ın Mateos
Finished the defense and lecture of the Final Degree Project on the
....... of .................... of ... in .........., in the Polytechnic School of
Universidad Carlos III de Madrid, accord to GRADE it:
...........
VOCAL
SECRETARY PRESIDENT
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Acknowledgements
Thanks to my parents and friends who have supported and encour-
aged me to get to where I am today.
Special gratitude goes also to my tutor whose advice and assis-
tance were key to complete this project.
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Contents
Abstract xv
Abstract xvii
Summary xix
1 Introduction 1
1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Objectives . . . . . . . . . . . . . . . . . . . . . . . . 2
1.3 Structure of this Document . . . . . . . . . . . . . . 3
2 State of the Art 5
2.1 Security and Hardware . . . . . . . . . . . . . . . . . 5
2.1.1 Random Number Generators . . . . . . . . . . 6
2.2 Pseudo-random Number Generators . . . . . . . . . . 7
2.3 True Random Number Generators . . . . . . . . . . . 9
2.3.1 Structure of a TRNG . . . . . . . . . . . . . . 10
2.4 FPGA Technology . . . . . . . . . . . . . . . . . . . 17
2.4.1 FPGA Block Structure . . . . . . . . . . . . . 19
2.4.2 Xilinx Spartan-3E . . . . . . . . . . . . . . . . 20
2.5 Implementing TRNGs on FPGAs . . . . . . . . . . . 22
3 Characterization of the TRNG 27
3.1 TRNG Under Study . . . . . . . . . . . . . . . . . . 27
3.2 Experimental Framework . . . . . . . . . . . . . . . . 28
3.2.1 FPGA Implementation . . . . . . . . . . . . . 29
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viii CONTENTS
3.2.2 Treatment of the Data . . . . . . . . . . . . . 30
3.2.2.1 Post Processing . . . . . . . . . . . . 32
3.3 Experiments: Results and Analysis . . . . . . . . . . 35
3.3.1 Frequencies . . . . . . . . . . . . . . . . . . . 36
3.3.2 Intradevice Testing . . . . . . . . . . . . . . . 46
3.3.3 Interdevice Testing . . . . . . . . . . . . . . . 50
3.3.4 Restart Experiment . . . . . . . . . . . . . . . 51
3.4 Final Analysis . . . . . . . . . . . . . . . . . . . . . . 53
4 Conclusions 55
4.1 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . 55
4.2 Future developments . . . . . . . . . . . . . . . . . . 57
5 Legal Aspects 61
6 Project Management 65
6.1 Planning . . . . . . . . . . . . . . . . . . . . . . . . . 65
6.1.1 Initial Planning . . . . . . . . . . . . . . . . . 65
6.1.2 Final Planning . . . . . . . . . . . . . . . . . 66
6.2 Budget . . . . . . . . . . . . . . . . . . . . . . . . . . 67
6.2.1 Initial Costs . . . . . . . . . . . . . . . . . . . 67
6.2.1.1 Initial Estimated Material Costs . . 67
6.2.1.2 Initial Estimated Personnel Costs . . 68
6.2.2 Final Costs . . . . . . . . . . . . . . . . . . . 69
6.2.2.1 Final Material Costs . . . . . . . . . 69
6.2.2.2 Final Personnel Costs . . . . . . . . 69
Appendices 70
A TRNG Code 73
B Creating the Hard Macro 83
C Python Scripts 87
CONTENTS ix
D Glossary 97
Bibliography 99
x CONTENTS