NASA Technical Reports Server (NTRS) 20110016556: Integrated Solar-Energy-Harvesting and -Storage Device

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by  NASA Technical Reports Server (NTRS)

Directional Radio-Frequency Identification Tag Reader
John F. Kennedy Space Center, Florida
A directional radio-frequency identifi- continuously transmits a signal to inter- In accordance with Public Law 96-517,
cation (RFID) tag reader has been de- rogate that tag while varying the radia- the contractor has elected to retain title to this
signed to facilitate finding a specific ob- tion pattern of the antenna. It identifies invention. Inquiries concerning rights for its
ject among many objects in a crowded the direction to the tag as the radiation- commercial use should be addressed to:
room. The device could be an adjunct pattern direction of peak strength of Lynne R. Henkiel, KSC Industry Liaison
to an electronic inventory system that the signal returned by the tag. An ap- KSC Technology Programs &
tracks RFID-tagged objects as they move proximate distance to the tag is calcu- Commercialization Office
through reader-equipped doorways. lated from the peak signal strength. The Mail Code YA-C1
Whereas commercial RFID-tag readers direction and distance can be displayed Kennedy Space Center, FL 32899
do not measure directions to tagged ob- on a screen. A prototype containing a Phone: [phone]
jects, the device is equipped with a Yagi antenna was found to be capable of Fax: [phone]
phased-array antenna and a received- detecting a 915.5-MHz tag at a distance E-mail: [email protected]
signal-strength indicator (RSSI) circuit of ≈15 ft (≈4.6 m). Refer to KSC-12348, volume and number
for measuring direction. At the begin- This work was done by Pedro J. Medelius, of this NASA Tech Briefs issue, and the
ning of operation, it is set to address John D. Taylor, and John J. Henderson of Dy- page number.
only the RFID tag of interest. It then nacs, Inc., for Kennedy Space Center.
Integrated Solar-Energy-Harvesting and -Storage Device
Efficiency would be maximized for anticipated ranges of operating conditions.
NASA’s Jet Propulsion Laboratory, Pasadena, California
A modular, integrated, completely than 2 mm thick. also be operated in a power-consuming,
solid-state system designed to harvest The thermoelectric devices would har- heat-pump mode to keep the batteries
and store solar energy is under develop- vest some of the thermal energy in- within a desired operational tempera-
ment. Called the “power tile,” the hybrid curred when solar radiation raises the ture range during intervals of dark-
device consists of a photovoltaic cell, a temperature on the photovoltaic-cell ness/cold. Microthermoelectric devices
battery, a thermoelectric device, and a side relative to the shaded backside. The that are no more than 500 µm thick are
charge-control circuit that are heteroge- battery would be placed on that opposite currently under fabrication for intended
neously integrated to maximize specific side, and the outer surface of its ther- integration into the power tile device.
energy capacity and efficiency. Power mally conductive envelope would be The solid-state battery system performs
tiles could be used in a variety of space coated with a thermally emissive mater- nominally in the temperature range of
and terrestrial environments and would ial to aid in creating the greatest possible –20 to 60 °C, and has been shown to
be designed to function with maximum temperature differential for optimum function at limited discharge rates to
efficiency in the presence of anticipated operation of the thermoelectric device. temperatures as low as –40 °C. These
temperatures, temperature gradients, The same thermoelectric devices could thin-film solid-state cells, based on mate-
and cycles of sunlight and shadow. Be-
cause they are modular in nature, one
Thermoelectric Devices Incident Solar Radiation
could use a single power tile or could
Photovoltaic Cells
construct an array of as many tiles as
needed. If multiple tiles are used in an
array, the distributed and redundant na-
ture of the charge control and distribu-
tion hardware provides an extremely
fault-tolerant system.
The figure presents a schematic view
of the device. High-efficiency photo-
voltaic cells would be attached to a thin-
film array of thermoelectric devices,
which, in turn, would be integrated to a
multi-layer thin-film solid-state battery
packaged in a thermally conductive en-
velope. The charge control circuitry Storage Battery
would be integrated either onto the bat-
tery side of the device or into a protec-
tive frame that would enclose the device. A Power Tile would include energy-harvesting, energy-storing, and temperature-regulating parts
The entire package is designed to be less integrated into a compact package.
NASA Tech Briefs, January 2004 11
rials systems originally developed at Oak 3 mm. The dual-junction photovoltaic true microthermoelectric devices, and
Ridge National Laboratories in the cell in this power tile is capable of deliv- extended lifetime testing.
1990’s, are capable of over 30,000 ering a current of 125 mA at a potential This work was done by Jay Whitacre, Jean-
charge/discharge cycles without appre- of 2.1 V in full sunlight (1 AU). The ther- Pierre Fleurial, Mohammed Mojarradi,
ciable capacity fade, and can withstand moelectric device, a commercial off-the- Travis Johnson, Margaret Amy Ryan, Rat-
intermittent heating and cooling to tem- shelf system 1.9 mm thick, generates a nakumar Bugga, William West, Subbarao
peratures above 100 °C and below –40 °C. current of 20 mA at a potential of ap- Surampudi, and Julian Blosiu of Caltech for
To achieve high efficiency, the photo- proximately 0.8 V when the photovoltaic NASA’s Jet Propulsion Laboratory. Fur-
voltaic, thermoelectric device and the side is at a temperature of 80 °C and the ther information is contained in a TSP (see
microbattery need to operate coherently. storage-battery side at a temperature of page 1)
A smart power silicon chip, currently 45 °C. The battery is a 1 mm thick In accordance with Public Law 96-517,
under development at JPL, will ensure Li/LiPON/LiCoO solid-state multilayer the contractor has elected to retain title to this
the coherent operation of the energy system capable of delivering 20 – 50 mW invention. Inquiries concerning rights for its
generating and storage devices within of power during the 1/2 hour of ellipse commercial use should be addressed to
the power tile system. This chip includes time typically encountered in low Earth Intellectual Assets Office
three synchronized high-efficiency DC- orbit. The photovoltaic cells and thermo- JPL
DC voltage converters for producing electric devices are integrated using a Mail Stop 202-233
common voltage from the three sources, thermally conductive silver epoxy, while 4800 Oak Grove Drive
a battery-charging circuit, a thermoelec- the battery is encased in aluminum. The Pasadena, CA 91109
tric heater driver circuit, and all the nec- power tile has been tested in an X-25 [phone]
essary sense and control circuits to pro- solar simulator and has been shown to E-mail: [email protected]
duce the synchronized operation. function in a variety of conditions. Ongo- Refer to NPO-30433, volume and number
A prototype power tile, fabricated at ing work includes miniaturizing the of this NASA Tech Briefs issue, and the
JPL, has dimensions of 3 cm by 3 cm by charge control electronics, integrating page number.
Event-Driven Random-Access-Windowing CCD Imaging System
Regions of interest can be adapted to changes in the scene.
NASA’s Jet Propulsion Laboratory, Pasadena, California
A charge-coupled-device (CCD) based 30564) NASA Tech Briefs, Vol. 26, No. 12 readout operation in the prior camera
high-speed imaging system, called a real- (December 2002), page 26. The architec- was defined on a per-line basis; in this
time, event-driven (RARE) camera, is un- ture of the prior camera requires tight cou- camera, it is defined on a per-ROI basis.
dergoing development. This camera is ca- pling between camera control logic and an In addition, the camera includes internal
pable of readout from multiple external host computer that provides com- timing circuitry. This combination of fea-
subwindows [also known as regions of in- mands for camera operation and processes tures enables real-time, event-driven op-
terest (ROIs)] within the CCD field of view. pixels from the camera. This tight cou- eration for adaptive control of the cam-
Both the sizes and the locations of the pling limits the attainable frame rate and era. Hence, this camera is well suited for
ROIs can be controlled in real time and functionality of the camera. applications requiring autonomous con-
can be changed at the camera frame rate. The design of the present camera trol of multiple ROIs to track multiple
The predecessor of this camera was de- loosens this coupling to increase the targets moving throughout the CCD
scribed in “High-Frame-Rate CCD Camera achievable frame rate and functionality. field of view. Additionally, by eliminating
Having Subwindow Capability”(NPO- From a host computer perspective, the the need for control intervention by the
FPGA Controller Card
Command Local Bus
Clock Control
Interpreter and Interface
Logic
Decoder Logic
Circuit
Logic Circuit Circuit
CCD
Imager and PCI Host
Signal-Processing Computer
Circuits
Pixel
CCD Pixel Handshake
First-In/First-Out
Readout Logic
Memory and
Logic Circuit Circuit
LVDS Cable Logic Circuit
Assembly
The RARE Camerais a high-speed CCD-based imaging system that offers enhanced speed and functionality for tracking moving targets.
12 NASA Tech Briefs, January 2004