Nanoelectronics: Device Physics and Fabrication Technology PDF
Preview Nanoelectronics: Device Physics and Fabrication Technology
NNaannooeelleeccttrroonniiccss:: DDeevviiccee PPhhyyssiiccss aanndd FFaabbrriiccaattiioonn TTeecchhnnoollooggyy MMaarrkk CC.. HHeerrssaamm AAssssiissttaanntt PPrrooffeessssoorr Department of Materials Science and Engineering Northwestern University, Evanston, IL 60208-3108 Ph: 847-491-2696, [email protected] http://www.hersam-group.northwestern.edu/ “640K ought to be enough for anybody” - Bill Gates, 1981 Department of Materials Science and Engineering, Northwestern University Moore’s Law Intel Co-Founder Gordon E. Moore “Cramming More Components Onto Integrated Circuits” Author: Gordon E. Moore Publication: Electronics, April 19, 1965 Department of Materials Science and Engineering, Northwestern University “No Exponential is Forever … but We Can Delay ‘Forever’,” Gordon E. Moore, International Solid State Circuits Conference, Feb. 10, 2003. Department of Materials Science and Engineering, Northwestern University “No Exponential is Forever … but We Can Delay ‘Forever’,” Gordon E. Moore, International Solid State Circuits Conference, Feb. 10, 2003. Department of Materials Science and Engineering, Northwestern University “No Exponential is Forever … but We Can Delay ‘Forever’,” Gordon E. Moore, International Solid State Circuits Conference, Feb. 10, 2003. Department of Materials Science and Engineering, Northwestern University IC Manufacturing Approach: Lithography G. D. Hutcheson, et al., Scientific American, 290, 76 (2004). Department of Materials Science and Engineering, Northwestern University Typical Lithographic Process Flow 1 PHOTORESIST PREPARED Si WAFER PROJECTED LIGHT SiO LAYER 2 SiN LAYER 3 4 Si SUBSTRATE RETICLE (OR MASK) 2 SIMILAR CYCLE IS REPEATED LENS TO LAY DOWN METAL LINKS 6 BETWEEN TRANSISTORS PATTERNS ARE PROJECTED NEW PHOTORESIST IS SPUN REPEATEDLY ONTO WAFER METAL ON WAFER AND STEPS 2 TO 4 CONNECTOR ARE REPEATED IONS SHOWER THE ETCHED 5 AREAS, DOPING THEM 3 4 EXPOSED DOPED PHOTORESIST REGION IS REMOVED AREAS UNPROTECTED BY PHOTORESIST ARE ETCHED BY GASES G. D. Hutcheson, et al., Scientific American, 274, 54 (1996). Department of Materials Science and Engineering, Northwestern University Lithography Yield NOTE: Typical fabrication facilities (fabs) have product yields > 95% (cid:198) Lithography yield per step > 99% Lithography is 90% of the production cost in modern day fabs G. Timp, Nanotechnology, Chapter 4 Department of Materials Science and Engineering, Northwestern University Lithography Areal Throughput Phenomenological Relationship: Resolution (Å) ~ 23A 0.2 t (A = areal throughput in μm2/hr) t This phenomenological relationship is essentially true over 18 orders of magnitude in throughput! G. Timp, Nanotechnology, Chapter 4 Department of Materials Science and Engineering, Northwestern University Lithography Pathways Pathways from pattern design to pattern transfer: (1) Can be direct (e.g., e-beam or ion beam lithography) (2) Usually a 2 step process (A) Generation of mask (B) Transfer of its pattern to a large number of substrates R. Waser (ed.), Nanoelectronics and Information Technology, Chapter 9 Department of Materials Science and Engineering, Northwestern University
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