NANO-CHIPS 2030: On-Chip AI for an Efficient Data-Driven World

597 Pages·2020·35.031 MB·English

by  Boris Murmann, Bernd Hoefflinger

T H E F R O N T I E R S C O L L E C T I O N
Boris Murmann
Bernd Hoefflinger
(Eds.)
-
N A N O
C H I P S
2 0 3 0
On-Chip AI for an Efficient
Data-Driven World
THE FRONTIERS COLLECTION
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fl
Boris Murmann Bernd Hoef inger
(cid:129)
Editors
NANO-CHIPS 2030
fi
On-Chip AI for an Ef cient Data-Driven
World
123
Editors
Boris Murmann BerndHoefflinger
Department ofElectrical Engineering Sindelfingen,Baden-Württemberg,Germany
StanfordUniversity
Stanford, CA,USA
ISSN 1612-3018 ISSN 2197-6619 (electronic)
TheFrontiers Collection
ISBN978-3-030-18337-0 ISBN978-3-030-18338-7 (eBook)
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Contents
1 The New Era of Nano-chips: Green and Intelligent . . . . . . . . . . . . 1
Boris Murmann and Bernd Hoefflinger
2 IRDS—International Roadmap for Devices and Systems,
Rebooting Computing, S3S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Bernd Hoefflinger
3 Real-World Electronics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Bernd Hoefflinger
4 Silicon Complementary MOS into Its 7th Decade. . . . . . . . . . . . . . 31
Bernd Hoefflinger
5 Nanolithography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Bernd Hoefflinger
6 The Future of Ultra-Low Power SOTB CMOS Technology
and Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Nobuyuki Sugii, Shiro Kamohara and Makoto Ikeda
7 Dealing with the EnergyVersus Performance Tradeoffin Future
CMOS Digital Circuit Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Wim Dehaene, Roel Uytterhoeven, Clara Nieto Taladriz Moreno
and Bob Vanhoof
8 Monolithic 3D Integration—An Update . . . . . . . . . . . . . . . . . . . . . 117
Zvi Or-Bach
9 Heterogeneous 3D Nano-systems: The N3XT Approach? . . . . . . . . 127
Dennis Rich, Andrew Bartolo, Carlo Gilardo, Binh Le, Haitong Li,
Rebecca Park, Robert M. Radway, Mohamed M. Sabry Aly,
H.-S. Philip Wong and Subhasish Mitra
10 High-Speed 3D Memories Enabling the AI Future . . . . . . . . . . . . . 153
Zvi Or-Bach
v
vi Contents
11 3D for Efficient FPGA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
Zvi Or-Bach
12 Digital Neural Network Accelerators . . . . . . . . . . . . . . . . . . . . . . . 181
Ulrich Rueckert
13 Enabling Domain-Specific Architectures with Programmable
Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203
Alireza Kaviani
14 Coarse-Grained Reconfigurable Architectures . . . . . . . . . . . . . . . . 227
Raghu Prabhakar, Yaqi Zhang and Kunle Olukotun
15 A 1000(cid:1) Improvement of the Processor-Memory Gap . . . . . . . . . . 247
Zvi Or-Bach
16 High-Performance Computing Trends . . . . . . . . . . . . . . . . . . . . . . 269
Bernd Hoefflinger
17 Analog-to-Information Conversion . . . . . . . . . . . . . . . . . . . . . . . . . 275
Boris Murmann, Marian Verhelst and Yiannos Manoli
18 Machine Learning at the Edge . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293
Marian Verhelst and Boris Murmann
19 The Memory Challenge in Ultra-Low Power Deep Learning . . . . . 323
Francesco Conti, Manuele Rusci and Luca Benini
20 Multi-sensor Scenarios for Intelligent SOCs . . . . . . . . . . . . . . . . . . 351
Bernd Hoefflinger
21 High-Dynamic-Range and Wide Color Gamut Video . . . . . . . . . . . 359
Zhichun Lei, Xin Yu and Markus Strobel
22 Update on Brain-Inspired Systems . . . . . . . . . . . . . . . . . . . . . . . . . 387
Ulrich Rueckert
23 Energy-Harvesting Applications and Efficient Power
Processing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 405
Thorsten Hehn, Alexander Bleitner, Jacob Goeppert,
Daniel Hoffmann, Daniel Schillinger, Daniel A. Sanchez
and Yiannos Manoli
24 Artificial Retina: A Future Cellular-Resolution Brain-Machine
Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 443
Dante G. Muratore and E. J. Chichilnisky
25 Augmented and Virtual Reality . . . . . . . . . . . . . . . . . . . . . . . . . . . 467
Gordon Wetzstein
Contents vii
26 Cryogenic-CMOS for Quantum Computing . . . . . . . . . . . . . . . . . . 501
Edoardo Charbon, Fabio Sebastiano, Masoud Babaie
and Andrei Vladimirescu
27 Quantum Computing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 527
AlbertFrisch,HarryS.Barowski,MarkusBrinkandPeterHansRoth
28 Human-Machine Interaction and Cognitronics . . . . . . . . . . . . . . . . 549
Ulrich Rueckert
29 Efficient System-on-Chip (SOC) for Automated Driving
with High Safety . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 563
Yutaka Yamada and Katsuyuki Kimura
30 The Thirties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 577
Boris Murmann and Bernd Hoefflinger
Index .... .... .... .... .... ..... .... .... .... .... .... ..... .... 585
Editors and Contributors
About the Editors
Boris Murmann received his Ph.D. degree from the University of California,
Berkeley in 2003 and serves as a professor of electrical engineering at Stanford
University.Hisresearchinterestsareinmixed-signalintegratedcircuitdesign,with
a focus on sensor interfaces, data converters, and custom circuits for embedded
machine learning. He has served as an associate editor of the IEEE Journal of
Solid-State Circuits, an AdCom member, and a distinguished lecturer of the IEEE
Solid-State Circuits Society, as well as the data converter subcommittee chair and
the technical program chair of the IEEE International Solid-State Circuits
Conference (ISSCC). He is a fellow of the IEEE.
Bernd Hoefflinger became an assistant professor at Cornell University, Ithaca,
NY, USA, after completing his Ph.D. at the Technical University of Munich,
Germany. He was a co-founder of the MOS Division of Siemens in Munich and
founded the electrical engineering department of the University of Dortmund,
Germany, which houses the first Ion-Implanted BiCMOS production line. After
serving as the head of the electrical engineering departments at the University of
Minnesota and then at Purdue University in Indiana, he established the Institute of
Microelectronics Stuttgart, Germany, as the first ISO 9000-certified research and
manufacturing facility—a leader in ASICs, HDR vision, and e-beam-driven nan-
otechnology.
Contributors
Masoud Babaie received the Ph.D. (cum laude) degree from the Delft University
ofTechnology,Delft,TheNetherlands,in2016.In2006,hejoinedtheKavoshcom
Research and Development Group, Tehran, where he was involved in designing
wireless communication systems. From 2009 to 2011, he was a CTO of that
ix
x EditorsandContributors
company. From 2014 to 2015, he was a visiting scholar researcher with the
Berkeley Wireless Research Center, Berkeley, CA, USA. In 2016, he joined the
Delft University of Technology, where he is currently an assistant professor
(tenured). He has co-authored one book, two chapters, 11 patents, and over 40
technical publications. His current research interests include RF/millimeter-wave
integrated circuits and systems for wireless communications and cryogenic elec-
tronics for quantum computation. He has been a committee member of ISSCC
Student Research Preview since 2017 and will join as a technical program com-
mittee of ESSCIRC in 2020. He was a co-recipient of the 2015–2016 IEEE
Solid-State Circuits Society Pre-Doctoral Achievement Award and the 2019
IEEE ISSCC Best Demo Award. In 2019, he received the Veni Award from the
Netherlands Organization for Scientific Research.
Harry S. Barowski studied physics at the University of Regensburg, where he
graduatedinlow-temperaturephysics1994.Hefinishedhisdoctoraldegreein1997
on far and infrared spectroscopy on various types of cuprate-based
high-temperature superconductors. After finishing his doctoral study, he started
his career as logic designer of mainframe processors at IBM Research and
Development in Boeblingen, Germany. Here he worked in logic design as logic
design engineer professional of computational units for high-performance proces-
sors for P and Z systems and gaming consoles (Cell processor for Sony
Playstation). He also was engaged in the field of formal logic verification and
customcircuitdesign.Hecurrentlyisfocussedoncustomarraydesignandphysical
and logical design verification methodologies. As IBM master inventor, he drives
technical innovations and new technologies. He contributed to several aspects of
IBM system Q, such as design of classical hardware components to the IBM Q
SystemOne,superconductingchipdesignandwascoachingtheIBMExtremeBlue
internship on implementation of the well-known HHL algorithm to solve a system
of linear equations into Qiskit.
Andrew Bartolo received the B.S. and M.S. degrees in computer science from
StanfordUniversity,Stanford,CA,USA,whereheiscurrentlyworkingtowardthe
Ph.D. degree in computer science. His work focuses on hardware and software
support for computation immersed in memory. His current research interests
include the fields of architecture, compilers, digital design, and networking.
Luca Benini holds the chair of digital circuits and systems at ETHZ and is a full
professorattheUniversitàdiBologna.Hisresearchinterestsareinenergy-efficient
parallel computing systems, smart sensing micro-systems, and machine learning
hardware. He has published more than 1000 peer-reviewed papers and five books.
HeisafellowoftheIEEE,oftheACMandamemberoftheAcademiaEuropaea.
Alexander Bleitner received the B.Sc. and M.Sc. degrees in embedded systems
engineeringfromtheUniversityofFreiburg,Freiburg,Germany,in2013and2017,
respectively,whereheiscurrentlypursuingthePh.D.degreeattheFritzHuettinger
Chair of Microelectronics, Department of Microsystems Engineering—IMTEK.
From 2010 to 2013, he was an intern at Siemens Medical Solutions in Forchheim,