Mosfet Modeling for VlSI Simulation: Theory And Practice

633 Pages·2007·27.09 MB·English

by  Narain Arora

MOSFET MODELING
FOR VLSI SIMULATION
Theory and Practice
International Series on Advances in Solid State Electronics and Technology
(ASSET)
Founding Editor: Chih-Tang Sah
Published:
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by Li Ming-Fu
Topics in Growth and Device Processing of III-V Semiconductors
by Stephen John Pearton, Cammy R. Abernathy & Fan Ren
Ionizing Radiation Effects in MOS Oxides
by Timothy R. Oldham
Forthcoming.
MOSFET Modeling for Circuit Analysis and Design
by Carlos Galup-Montoro & Marcio Cherem Schneider
The Physics and Modeling of MOSFETS: Surface-Potential Model HiSIM
by Mitiko Miura-Mattausch, Hans Jurgen Mattausch & Tatsuya Ezaki
BSIM4: Theory and Engineering of MOSFET Modeling for IC Simulation
by Weidong Liu & Chenming Hu
ASSET
International series on Advances in solid state Electronics and Technology
Founding Editor: Chih-Tang sah
MOSFET MODELING
FOR VLSl SIMULATION
Theory and Practice
Narain Arora
Cadence Design Systems, USA
1;
World Scientific
-
NEW JERSEY * LONDON SINGAPORE * BElJlNG SHANGHAI * HONG KONG * TAIPEI * CHENNAI
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MOSFET MODELING FOR VLSI SIMULATION
Theory and Practice
International Series on Advances in Solid State Electronics and Technology
Copyright 0 2007 by World Scientific Publishing Co. Pte. Ltd.
All rights reserved. This book, or parts there% m yn ot be reproduced in any form or by any means,
electronic or mechanical, including photocopying, recording or any information storage and retrieval
system now known or to be invented, without written permission from the Publisher.
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ISBN-13 978-981-256-862-5
ISBN- 10 98 1- 256-862-X
Disclaimer: This book was prepared by the authors. Neither the Publisher nor its Series Editor
thereof, nor any of their employees, assumes any legal liability or responsibility for the accuracy,
completeness, or usefulness of any information. The contents, views, and opinions of the authors
expressed herein do not necessarily state or reflect those of the Publisher, its Series Editor, and their
employees.
Printed in Singapore by World Scientific Printers (S) Pte Ltd
In the loving memory of my parents
Hukamdevi and Guranditta Arora
TThhiiss ppaaggee iinntteennttiioonnaallllyy lleefftt bbllaannkk
Foreword
The purpose of this compact modeling monograph series is to provide an archival
reference on each specific MOS transistor compact model as described by the originators or the
veterans of each compact model. The monograph idea came about when this editor was looking
into the literature to prepare for a keynote address, invited by the Founder of the Workshop on
Compact Modeling, Professor Xing Zhou of Nanyang Technology University, and his program
committee, to be presented at its 4Ih Workshop on May 10, 2005. The topic was on the history of
MOS transistor compact modeling, a subject this editor could not find a reference or book that
provided the descriptions of each of the dozen or more MOS transistor compact models, which
had been extensively developed for the first-generation computer-aided circuit design
applications during 1995-2005, such as the use of the Berkeley BSlM and SPICE. A second
purpose is to serve as textbooks for graduate students and reference books for practicing
engineers, to rapidly distribute the detailed design methodologies and underlying physics in
order to meet the ever faster advances in the design of silicon semiconductor MOS and bipolar-
junction-transistor integrated circuits, which contain hundreds or thousands of transistors per
circuit or circuit function. I am especially thankful to the authors of the four startup monograph
volumes who concurred with me and agreed to take up the chore to write their books in the very
short time of less than six months in order to be published in one year, which we try as a rapid
response to document the latest advances. It is also the objective of this monograph series to
provide timely updates via website exchanges between the readers and authors, for public
distribution, and for new editions when sufficient materials are accummulated by the authors.
We are especially indebted to Dr. Narain Arora who agreed to allow us to reprint his 1993
classic, first published by Springer-Verlag, Wien, New York, as the lead of these initial four
monographs. Dr. Arora’s book was the first textbook and also reference book on MOS transistor
modeling. It has since educated tens of thousands of practicing engineers and graduate
students on the developments of compact MOS transistor models and their device physics
bases, which have provided rapid computations of accurate MOS transistor characteristics. The
physics base makes Arora’s book timeless, for the underlying physics on how the transistor
works and how it should be modeled by equivalent circuits, does not change with time, only
details from adding more physical phenomena as the technology advances.
I would like to thank all the WSPC editors and this monograph volume’s copy editor Mr.
Tjan Kwang Wei at Singapore, led by Dr. Yubing Zhai at New Jersey, for their and her timely
efforts, and Professor Kok-Khoo Phua, Founder and Chairman of WSPC, for his support, all of
which have made it possible to attain a less-than-one-year turn-around time to print each
monograph volume, in order to meet our intention of responding to the rapid advances of the
state of the art of computer-aided integrated circuit design.
Chih-Tang Sah
Gainesville, San Diego, Singapore, Beijing and Xiaman.
October 1, 2006
TThhiiss ppaaggee iinntteennttiioonnaallllyy lleefftt bbllaannkk
Preface
Metal Oxide Semiconductor (MOS) transistors are the basic building block
of MOS integrated circuits (IC). Very Large Scale Integrated (VLSI) circuits
using MOS technology have emerged as the dominant technology in the
semiconductor industry. Over the past decade, the complexity of MOS IC's
has increased at an astonishing rate. This is realized mainly through the
reduction of MOS transistor dimensions in addition to the improvements
in processing. Today VLSI circuits with over 3 million transistors on a
chip, with effective or electrical channel lengths of 0.5 microns, are in volume
production. Designing such complex chips is virtually impossible without
simulation tools which help to predict circuit behavior before actual circuits
are fabricated. However, the utility of simulators as a tool for the design
and analysis of circuits depends on the adequacy of the device models used
in the simulator. This problem is further aggravated by the technology
trend towards smaller and smaller device dimensions which increases the
complexity of the models.
There is extensive literature available on modeling these short channel
devices. However, there is a lot of confusion too. Often it is not clear what
model to use and which model parameter values are important and how
to determine them. After working over 15 years in the field of semiconductor
device modeling, I have felt the need for a book which can fill the gap
between the theory and the practice of MOS transistor modeling. This
book is an attempt in that direction.
The book deals with the MOS Field Effect transistor (MOSFET) models
that are derived from basic semiconductor theory. Various models are
developed ranging from simple to more sophisticated models that take into
account new physical effects observed in submicron devices used in today's
MOS VLSI technology. The assumptions used to arrive at the models are
emphasized so that the accuracy of the model in describing the device
characteristics are clearly understood. Due to the importance of designing
reliable circuits, device reliability models have also been covered. Under-
standing these models is essential when designing circuits for state of the
art MOS IC's.