Low-Voltage Low-Power Analog Integrated Circuits: A Special Issue of Analog Integrated Circuits and Signal Processing An International Journal Volume 8, No. 1 (1995)

116 Pages·1995·4.673 MB·English

by  Wouter Serdijn (auth.), Wouter Serdijn (eds.)

LOW-VOLTAGE LOW-POWER
ANALOG INTEGRATED CIRCUITS
edited by
Wouter Serdijn
Deljt University of Technology
A Special Issue of
ANALOG INTEGRATED CIRCUITS
AND SIGNAL PROCESSING
An International Journal
Volume 8, No. 1 (1995)
SPRINGER SCIENCE+BUSINESS MEDIA, LLC
THE KLUWER INTERNATIONAL SERIES
IN ENGINEERING AND COMPUTER SCIENCE
ANALOG CIRCUITS AND SIGNAL PROCESSING
Consulting Editor
Mohammed Ismail
Ohio State University
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FREQUENCY COMPENSATION TECHNIQUES LOW-POWER OPERATIONAL
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INTEGRATED FIBER-OPTIC RECEIVERS, Aaron Buchwald, Kenneth W. Martin
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MODELING WITH AN ANALOG HARDWARE DESCRIPTION LANGUAGE,
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ANALYSIS AND SYNTHESIS OF MOS TRANSLINEAR CIRCUITS, Remco J. Wiegerink
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ANALOG INTEGRATED
CIRCUITS AND
SIGNAL PROCESSING
An International Jo umal
Volume 8, No.1, July 1995
Special Issue: Low-Voltage Low-Power Analog Integrated Circuits
Guest Editors: Wouter A. Serdijn, Albert C. van der Woerd and Jeroen C. Kuenen
Guest Editorial . . . . . . . . . . . . . . . . . . . . . . .. W. A. Serdijn. Albert C. van der Woerd and Jeroen C. Kuenen 5
A High Performance RDS-detector for Low Voltage Applications ................................ .
· . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. M. Steyaert. J. Crols and G. Van der Plas 7
Partial Positive Feedback for Gain Enhancement of Low-Power CMOS OTAs ...................... .
· ......................................................... Rongtai Wang and Ramesh Harjani 21
Parallel Feedforward Class-AB Control Circuits for Low-Voltage Bipolar Rail-to-Rail Output Stages of
w.
Operational Amplifiers ......................... C. M. Renirie. K. J. de Langen. and 1. H. Huijsing 37
Low-Voltage Low-Power Opamp Based Amplifiers ........................................... .
· ................ Johan H. Hllijsing. Klaas-Jan de Langen. Ron Hogervorst. and Rlilid G. H. Eschauzier 49
An Integratable Second-Order Compensated Bandgap Reference for 1V Supply .................... .
· . . . . . . . . . . . . . . . . . . . .. A. van Staveren. J. van Velzen. C. J. M. Verhoeven. and A. H. M. van Roermund 69
An Analytical MOS Transistor Model Valid in All Regions of Operation and Dedicated to Low-Voltage and
Low-Current Applications . . . . . . . . . . . . . .. Christian C. Enz. Franqois Krummenacher and Eric A. Vittoz 83
Design Principles for Low-Voltage Low-Power Analog Integrated Circuits ......................... .
· ............. WOllter A. Serdijn. Albert C. van der Woerd. Arthur H. M. van Roermund and Jan Davidse 115
ISBN 978-1-4613-5963-0 ISBN 978-1-4615-2283-6 (eBook)
DOI 10.1007/978-1-4615-2283-6
Library of Congress Cataloging-in-Publication Data
A c.I.P. Catalogue record for this book is available
from the Library of Congress.
Copyright © 1995 by Springer Science+Business Media New York
OriginaHy published by Kluwer Academic Publishers in 1995
Softcover reprint ofthe hardcover Ist edition 1995
AH rights reserved. No part of this publication may be reproduced, stored in
a retrieval system or transmitted in anY form or by any meanS, mechanical,
photo-copying, recording, or otherwise, without the prior written permission of
the publisher, Springer Science+Business Media, LLC
Printed on acid-free paper.
Analog Integrated Circuits and Signal Processing, 8, 5-6 (1995)
© 1995 Kluwer Academic Publishers, Boston. Manufactured in The Netherlands.
Guest Editorial
This Special Issue is dedicated to low-voltage low ftuence on the performance.
power analog integrated circuits. Low-voltage low In the fourth paper "Low-voltage low-power opamp
power circuit techniques are applied in the area of based amplifiers," by Johan H. Huijsing, Klaas-Jan de
battery-operated systems. In particular they are of Langen, Ron Hogervorst and Ruud G. H. Eschauzier,
crucial importance for implantable devices, such as it is argumented that amplifiers operating under low
voltage and low-power conditions are severely limited
pacemakers, blood flow meters and auditory stimula
in dynamic range and bandwidth. Several techniques
tors. Also, as more and.increasingly complex systems
are presented to reach both the maximally attainable
are integrated on the same chip, area minimization
dynamic range and bandwidth.
becomes of primary importance. Typical examples of
In the fifth paper, by Arie van Staveren, Jeroen van
these types of systems are portable radios, hand-carried
Vel zen, Chris J. M. Verhoeven and Arthur H. M. van
radiotelephones, pagers and hearing instruments. As
Roermund, an integrable second-order compensated
the size of batteries is now becoming the limiting factor,
bandgap reference for I-V supply, in which a linear
it is not sufficient to reduce the size of the other bulky
combination of only two base-emitter voltages is ap
components by integrating them; the reduction of the
plied to compensate implicitly for the temperature be
power dissipation is also very important. Therefore,
havior of these base-emitter voltages, is presented.
the key is to develop, simultaneously, both low-voltage
The sixth paper, by Christian C. Enz, Fran~ois
and low-power operating integrated circuits in order to
Krummenacher and Eric A. Vittoz, presents a fully an
reduce the battery size.
alytical MOS transistor model dedicated to the design
This Special Issue contains six selected papers that
and analysis oflow-voltage low-current analog circuits.
present recent developments in the field oflow-voltage
In this model, all the large-and small-signal variables,
low-power analog electronics.
namely the currents, the transconductances, the intrin
The first paper, by Michiel Steyaert, Jan Crols and
sic capacitances, the non-quasi-static transadmittances
Geert van der Plas, presents a high-performance RDS
and the thermal noise, are continuous in all regions of
(Radio-Data-System) detector for low voltage (1.8 V)
operation, including weak inversion, moderate inver
applications. The non-conventional topology, consist
sion, strong inversion, conduction and saturation.
ing of a mixer and a low-pass filter, guarantees an im
Finally, in the seventh paper "Design Principles for
proved performance, despite the low supply voltage.
Low-Voltage Low"Power Analog Integrated Circuits,"
In the second paper "Partial positive feedback for
by Wouter A. Serdijn, Albert C. van der Woerd, Arthur
gain enhancement of low-power CMOS OTAS," by H. M. van Roermund and Jan Davidse, it is argumented
Rongtai Wang and Ramesh Harjani, it is shown that, for that there are good reasons to choose current as the
a fixed power consumption, partial positive feedback information-carrying quantity in case of low-voltage
can be used to increase both the gain and bandwidth of low-power design constraints. This paper focuses on
low-power CMOS OTA designs. the influence of the transfer quality on that choice. To
The third paper, by Wim C. M. Renirie, Klaas-Jan obtain power-efficient transfer quality, indirect feed
de Langen and Johan H. Huijsing, presents five class back is shown to be a good alternative to traditional
AB control circuits for low-voltage bipolar rail-to-rail feedback techniques.
output stages of operational amplifiers. These circuits The editors would like to thank all the authors who
have been designed in such a way that temperature, submitted papers, all the reviewers who participated
supply voltage and process parameters have little in- in the final selection of the papers, and the Kluwer
6 Wouter A. Serdijn, Albert C. van der Woerd, and Jeroen C. Kuenen
Editorial Staff for their efforts in creating this Special
Issue. We hope that this issue will provide you, the
reader, with a useful introduction to the potential of
low-voltage low-power analog integrated circuits.
Wouter A. Serdijn
Albert C. van der Woerd
Jeroen C. Kuenen
Albert C. van der Woerd was born in 1937 in Leiden,
the Netherlands. In 1977 he received his 'ingenieurs'
(M.Sc.) degree in electrical engineering from the Delft
University of Technology, Delft, the Netherlands. He
was awarded his Ph.D. in 1985. From 1959 to 1966 he
was engaged in research on and development of radar
and TV circuits at several industrial laboratories. In
Wooter A. Serdijn was born in Zoetermeer, the
1966 he joined the Electronics Research Laboratory
Netherlands, in 1966. He started his course at the Fac
of the Faculty of Electrical Engineering of the Delft
ulty of Electrical Engineering at the Delft University
University of Technology. During the first 11 years he
of Technology in 1984, and received his 'ingenieurs'
carried out research on electronic musical instruments.
(M.Sc.) degree in 1989. Subsequently, he joined the
. For the next 8 years his main research subject was car-
Electronics Research Laboratory of the same univer
rier domain devices. More recently he has specialized
sity where he received his Ph.D. in 1994. His re
in the field of low-voltage low-power analog circuits
search includes developing a formal design theory for
and systems. He teaches design methodology.
low-voltage low-power analog integrated circuits along
with the development of circuits for hearing instru
ments.
Jeroen C. Koenen was born in Alkmaar, the Nether
lands, in 1967. He received his 'ingenieurs' (M.Sc.)
degree in electrical engineering from the Delft Univer
sity of Technology in 1991. He is currently working
towards a Ph.D. at the Electronics Research Laboratory
of the same university. His current research interests
include low-voltage low-power analog electronic cir
cuits.
Analog Integrated Circuits and Signal Processing, 8,7-19 (1995)
© 1995 K1uwer Academic Publishers, Boston. Manufactured in The Netherlands.
A High Performance RDS-detector for Low Voltage Applications
M. STEYAERT, J. CROLS AND G. VAN DER PLAS
K. U. Lel/ven, ESAT-MICAS. Kardinaal Mercierlaan 94. 300] Heverlee, Belgium
Abstract. The design and realisation of the analog part for an RDS-receiver, the RDS-detector, is discussed in
this paper. The RDS-receiver is developed towards low voltage applications (1.8 V) with low power consumption
requirements. A new topology for RDS-receivers is introduced resulting in an important quali.ty. improvement,
mainly being a higher phase-linearity and a lower power consumption. The performance of the chip IS compar~d to
existing RDS-receivers. These receivers use an analog integrated bandpass filter. In the presented topology direct
conversion followed by lowpass filtering is used. The chip is realised in a fully differential switched-capacitor
technique with correlated double sampling. The latter is used to obtain a very low equivalent input DC-offset. The
chip is implemented in a 2 (Lm BiCMOS technology.
1. Introduction often a discrete filter fabricated in SMD-technology.
Now integrated filters are used for their quality im
The Radio-Data-System (RDS) is a European system
provement and cost reduction [2, 3]. These integrated
that adds a digital information channel to the public ra
bandpass filters are all realised with the switched
dio broadcasts in FM on the UHF-band [1]. It offers ex
capacitor technique, which has certain advantages in
tra services like automatic scanning, transmitter identi
this application. Apart from the short design cycle that
fication and traffic information indication. Nowadays
can be achieved with a standard switched-capacitor fil
its main application is in car-radio because such an ap
ter, the filter accuracy is very high and this is important
plication, wherein the radio receiver moves frequently
because a high phase-linearity is needed to prevent de
between geographical areas, benefits the most from the
terioration of the RDS eye-diagram.
extra RDS-services.
Although the use of RDS was limited to car-radio,
The digital information is transmitted using differ
the market is now expanding towards portable FM
entially coded 2-PSK modulation. It has a bit rate of
receivers. Especially the walkman size radios will soon
1187.5 bits/so The bitstream is doublesideband AM
be equipped with the RDS-services. In this paper the
modulated with suppressed carrier and becomes in this
design of an RDS-receiver that meets the specifications
way the RDS-signal. The signal has a bandwidth of
for this new branch of applications will be discussed.
approximately 3 kHz and it is modulated on a 57 kHz
Main design goals are the operation on a low power
carrier. Before FM-modulationit is added to the MPX
supply voltage (operation on two batteries, being be
signal that contains the mono and stereo sound infor
tween 1.8 V to 2.7 V), a low power consumption and
mation and the 19 kHz pilottone for stereo decoding.
an improved performance.
Fig. I depicts the spectrum of an MPX-signal.
A new receiver topology will be introduced and the
Until now demodulation of the RDS-signal has al
chip-realisation of the analog part will be discussed.
ways been done in more or less the same way. After the
The new topology is presented and compared to the
FM-demodulation an 8th order bandpass Gaussian fil
existing ones in the second part of this paper. It is
ter with a bandwidth of 3 kHz centered around 57 kHz
shown how the use of this topology improves perfor
provides the separation of the RDS-signal from the total
mance and lowers power consumption. The third part
MPX-signal. Further demodulation is then done com
of this paper describes all aspects of the designed ana
pletely digital by means of a Costas loop [2]. The ana
log chip. Practical results consisting of measurements
log filter is a crucial part in this system and its quality
of the chip and the use of the chip in a complete RDS
has an important influence on the overall system per
radio environment are given in the fourth part.
formance. Until recently the bandpass filter used, was
8 Steyaert, Crols and Van der Plas
dB
o - Stereo
-10 - Pilottone
Mono
-20 -
-30 -
RDS
-40 - M
-50
Ok 19k 38k 57k f[Hz]
Fig. 1. Spectrum of the MPX-signal.
2. The Topology much stronger component of the MPX-signal than the
RDS-signal. It has 40 times more power in the MPX
In fig. 2a the classic topology for an RDS-receiver is spectrum than the RDS-signal. This means that in this
given [2, 3]. An analog bandpass filter is followed by topology, with demodulation based on the pilottone,
a digital Costasloop. The analog filter is an 8th order a clock-signal is available downto far worse circum
Gaussian bandpass filter. In an integrated version this stances and as long as there is a clock-signal, demodu
filter is a switched-capacitor filter whose capacitor ra la,tion is possible. The threshold level for demodulation
tios are synthesized to obtain a maximal phase-linearity is much lower in this case and although the bit-error
in the passband. After the analog filter the AM-signal rate can be high under these circumstances, digital error
on 57 kHz is clipped and I bit sampled. From this detection and correction still allow the RDS-receiver to
signal the digital loop extracts the clock with which function.
coherent demodulation is performed. This is followed A second advantage of the presented topology is that
by the biphase and differential decoding. it uses a lowpass filter instead of a bandpass filter. The
In fig. 2b an alternative topology is presented. It is use of a lowpass filter reduces the filter's sensitivity
also a coherent demodulator but in this case a direct to component variation drastically. In this way the
conversion is performed at the input. Only after down phase-linearity, measured by the in-band variation of
conversion the RDS-signal is separated from the total the group delay, can be decreased by a decade. Next
MPX-signal by means of a lowpass filter. The clock to this, lowpass filters have the advantage that for the
signal is not extracted from the RDS-signal but from the same total integrated capacitance their noise is Q times
19 kHz pilottone. The necessary 57 kHz carrier that is lower [4]. For this application, a bandpass filter has
in phase with this tone is one of the signals that is avail approximately a Q of 19 (57 kHz/3 kHz). The conse
able in the PLL of the stereo decoder. During trans quence is that for an equal noise level a lowpass filter
mission the RDS information is modulated to 57 kHz requires about Q times smaller capacitances and there
based on the pilottone so that coherency between pilot fore Q times less power than a bandpass filter. In a low
tone and RDS-signal is assured. This RDS-receiver is voltage and low power application this is a considerable
meant for integration together with the stereo decoder improvement. Furthermore, the power consumption is
on the same chip. reduced even more by the use of a lower operating fre
The advantages of this topology are threefold. First quency.
the use of the pilottone as clock-reference instead of the The third advantage lies in the fact that chip area and
RDS-signal itself results in an improved performance. circuit complexity is reduced in two ways. There is no
Clock-recovery from the RDS-signal requires that its additional circuitry for the clock regeneration neces
SNR exceeds a certain minimum threshold level. Be sary, as it is already available in the stereo decoder.
low this level no clock-recovery and therefore no de The digital part of the receiver becomes very small as
modulation is possible. The pilottone however is a the main signal processing, demodulation and filtering,
A High Perfonnance RDS-detector for Low Voltage Applications 9
OSC.
I clock coherent clock
r
j I 1 I
,--
MP- X ;---. lLL I--;.......... f I------- CoDstiagsi-tlaolo p I-------- Bdiepmhoasde I------- Difdfeemreondti al f---RD-
'----
Switched-cap
bandpass fIlter
ANALOG PART DIGITAL PART
(a)
~
Stereo
Decoder R
I--
STEREO DECODER
M PX
PLL
114kHz coherent clock
-0=
I I
~
L f Bifaze Differential RD s
f--..--- ~ demod ~ demod f----
'---
Switched-cap
lowpass filter
ANALOG PART DIGITAL PART
(b)
Fig. 2. (a) Classic topology for an RDS-receiver and (b) the presented RDS-receiver topology.
10 Steyaert, Crols and Van der Plas
is done in the analog part. Moreover the use of analog 1
instead of digital signal processing decreases the power
consumption. In this topology the RDS-information is
l'~
almost completely demodulated by the analog part.
The receiver topology presented, direct conversion, v+ .~ V~ut
_----.-_-+-__. ../
however introduces one important problem that has m
to be solved before successful application can be
l'
achieved. A DC-offset introduced by the filter is indis TV;'"
tinguishable from the signal and deteriorates the RDS V~m L--_~
signal. This is an important and severe extra constraint.
It will however be solved by designing a filter exhibit 1
ing a very low equivalent DC-offset and with this it
will be proven that the presented topology achieves an
overall performance enhancement over RDS-receivers Fig. 3. The simple mixer circuit.
built today, despite the low power supply voltage.
power supply voltage [5]. The specifications for dis
3. The Analog Part
tortion and offset, given in table 1, exclude the OTA-C
In this part the designed circuit for the RDS-detector, architectures as they are -60 dB and 300 f..t V at 1.8 V
power supply. RC filters can not be used due to the area
the analog part of the RDS-receiver, is described in
implication of the low cut-off frequency and necessary
all its aspects. Table 1 gives the specification for the
tuning circuit [6]. The 1.5 kHz cut-off frequency im
RDS-receiver. These specifications are the same as for
the existing RDS-receivers [2, 3]. Some specifications plies four tuneable capacitors of 100 pF with resistors
(frequency response and phase-linearity) are transla of about 300 kQ. Mosfet-C filters are also not feasible
due to the impossibility to tune the resistors at these low
tions from the topologies with an analog bandpass filter
supply voltages [7]. Moreover both last implementa
to the lowpass filter configuration. Phase-linearity is
tions don't offer techniques to reduce the DC-offset to
measured by the in-band variation of the group delay
the very low values required in this application.
response (the derivative of the phase).
In switched-capacitorthe low cut-off frequency is no
problem when one uses a low clock-frequency. This
3.1. Filter Synthesis obviously can only be done when it causes no unwanted
aliasing effects. In this application the FM-receiver
In table 1 the required filter specifications on frequency and demodulator can act as a strong anti-aliasing fil
response and phase-linearity are summarised. The re ter for the RDS-receiver. Furthermore die availability
quirements for the in-band phase-linearity are severe in switched-capacitor technology of offset cancelling
and can only be satisfied by choosing a Gaussian trans techniques and the ease with which a mixer can be
fer function as this gives by definition the most flat implemented point towards the utilisation of the latter
group delay response. The order of the filter is deter technology. In order to be able to implement a good
mined by the out of band suppression. A fourth order offset-cancelling technique a fully differential struc
Gaussian filter is necessary to obtain a suppression of ture is necessary. A fully differential structure makes
50 dB at 20 kHz. it also more feasible to satisfy the distortion specifica
tion. The technique that is used to cancel the offset of
the opamps is Correlated Double Sampling (CDS) [8].
3.2. Detector Architecture Due to the fully differential structure the second source
of offset, offset introduced by c1ock-feedthrough, in
The implementation of the filter can be performed with first order only results in common-mode offset and is
several integrated circuit techniques: OTA-C, Mosfet therefore harmless.
C, RC and switched-capacitor. The linearity of OTA The implementation of an offset free mixer is straight
C filters is very limited at low power supply voltages forward in a fully differential switched-capacitor struc
and its distortion increases rapidly with lowering of the ture. The input signal is down converted by cross-