Low-Power, 16-Bit, 1-MHz, Single/Dual Unipolar Input, ADCs w

50 Pages·2017·2.29 MB·English

ADS8329
ADS8330
www.ti.com................................................................................................................................................... SLAS516C–DECEMBER2006–REVISEDJULY2009
LOW-POWER, 16-BIT, 1-MHz, SINGLE/DUAL UNIPOLAR INPUT,
ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL INTERFACE
FEATURES APPLICATIONS
1
• 2.7-Vto5.5-VAnalog Supply,LowPower: • Communications
2
– 15.5mW(1MHz,+VA=3V, +VBD=1.8 V) • TransducerInterface
• 1-MHzSamplingRate3V≤+VA≤5.5V, • Medical Instruments
900-kHz SamplingRate2.7V≤+VA≤3V • Magnetometers
• ExcellentDCPerformance: • IndustrialProcessControl
±1.0LSBTyp,±1.75LSBMaxINL • DataAcquisitionSystems
±0.5LSBTyp,±1LSBMax DNL • AutomaticTestEquipment
16-BitNMCOver Temperature
±0.5mVMaxOffsetError at3V DESCRIPTION
±1mVMaxOffsetErrorat5V
The ADS8329 is a low-power, 16-bit, 1-MSPS
• ExcellentACPerformanceatfI=10kHzwith analog-to-digital converter (ADC) with a unipolar
93dBSNR,105dBSFDR,–102dB THD input. The device includes a 16-bit capacitor-based
• Built-InConversionClock(CCLK) SARADCwithinherentsample-and-hold.
• 1.65Vto5.5VI/OSupply: The ADS8330 is based on the same core and
SPI/DSPCompatibleSerial includes a 2-to-1 input MUX with programmable
SCLKupto50MHz option of TAG bit output. Both the ADS8329 and
ADS8330 offer a high-speed, wide voltage serial
• ComprehensivePower-Down Modes:
interface and are capable of chain mode operation
DeepPower-Down
whenmultiple convertersare used.
NapPower-Down
AutoNapPower-Down These converters are available in 4 × 4 QFN and
16-pin TSSOP packages, and are fully specified for
• UnipolarInputRange:0V toV
REF operation over the industrial –40°C to +85°C
• SoftwareReset temperaturerange.
• GlobalCONVST(IndependentofCS)
• ProgrammableStatus/PolarityEOC/INT Low Power,High-SpeedSARConverterFamily
• 16-Pin4×4QFNand16-PinTSSOP Packages Type/Speed 500kSPS 1MSPS
• Multi-ChipDaisyChainMode Single ADS8327 ADS8329
16-bitsingle-ended
• ProgrammableTAGBitOutput Dual ADS8328 ADS8330
Single — ADS7279
• Auto/ManualChannelSelectMode (ADS8330) 14-bitsingle-ended
Dual — ADS7280
Single — ADS7229
12-bitsingleended
Dual — ADS7230
OUTPUT
ADS8330 ADS8329 SAR LATCH SDO
and
+IN1 NC
3−STATE
DRIVER
+
+IN0 +IN _ CDAC
FS/CS
CONVERSION
SCLK
COM −IN COMPARATOR and
SDI
CONTROL
REF+ OSC LOGIC CONVST
REF− EOC/INT/CDI
1
Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas
Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.
Alltrademarksarethepropertyoftheirrespectiveowners.
2
PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2006–2009,TexasInstrumentsIncorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarilyincludetestingofallparameters.
ADS8329
ADS8330
SLAS516C–DECEMBER2006–REVISEDJULY2009................................................................................................................................................... www.ti.com
Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam
duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates.
ORDERINGINFORMATION(1)
MAXIMUM MAXIMUM MAXIMUM
INTEGRAL DIFFERENTIAL OFFSET TRANSPORT
LINEARITY LINEARITY ERROR PACKAGE PACKAGE TEMPERATURE ORDERING MEDIA,
MODEL (LSB) (LSB) (mV) TYPE DESIGNATOR RANGE INFORMATION QUANTITY
ADS8329IRSAT Smalltapeandreel,250
4×4QFN-16 RSA
ADS8329IRSAR Tapeandreel,3000
ADS8329I ±2.5 –1/+2 ±0.8 –40°Cto+85°C
ADS8329IPW Tube,90
TSSOP-16 PW
ADS8329IPWR Tapeandreel,2000
ADS8329IBRSAT Smalltapeandreel,250
4×4QFN-16 RSA
ADS8329IBRSAR Tapeandreel,3000
ADS8329IB ±1.75 ±1 ±0.5 –40°Cto+85°C
ADS8329IBPW Tube,90
TSSOP-16 PW
ADS8329IBPWR Tapeandreel,2000
ADS8330IRSAT Smalltapeandreel,250
4×4QFN-16 RSA
ADS8330IRSAR Tapeandreel,3000
ADS8330I ±2.5 –1/+2 ±0.8 –40°Cto+85°C
ADS8330IPW Tube,90
TSSOP-16 PW
ADS8330IPWR Tapeandreel,2000
ADS8330IBRSAT Smalltapeandreel,250
4×4QFN-16 RSA
ADS8330IBRSAR Tapeandreel,3000
ADS8330IB ±1.75 ±1 ±0.5 –40°Cto+85°C
ADS8330IBPW Tube,90
TSSOP-16 PW
ADS8330IBPWR Tapeandreel,2000
(1) ForthemostcurrentpackageandorderinginformationseethePackageOptionAddendumattheendofthisdocument,orseetheTI
websiteatwww.ti.com.
ABSOLUTE MAXIMUM RATINGS
Overoperatingfree-airtemperaturerange,unlessotherwisenoted.(1)
UNIT
+INtoAGND –0.3Vto+VA+0.3V
Voltage
–INtoAGND –0.3Vto+VA+0.3V
+VAtoAGND –0.3Vto7V
+REFtoAGND –0.3Vto+VA+0.3V
Voltagerange –REFtoAGND –0.3Vto0.3V
+VBDtoBDGND –0.3Vto7V
AGNDtoBDGND –0.3Vto0.3V
DigitalinputvoltagetoBDGND –0.3Vto+VBD+0.3V
DigitaloutputvoltagetoBDGND –0.3Vto+VBD+0.3V
T Operatingfree-airtemperaturerange –40°Cto+85°C
A
T Storagetemperaturerange –65°Cto+150°C
stg
Junctiontemperature(T max) +150°C
J
4×4QFN-16 Powerdissipation (TJMax–TA)/q JA
package q thermalimpedance +47°C/W
JA
TSSOP-16 Powerdissipation (TJMax–TA)/q JA
package q thermalimpedance +86°C/W
JA
(1) Stressesbeyondthoselistedunderabsolutemaximumratingsmaycausepermanentdamagetothedevice.Thesearestressratings
only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderrecommendedoperating
conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability.
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ELECTRICAL CHARACTERISTICS
T =–40°Cto85°C,+VA=4.5Vto5.5V,+VBD=1.65Vto5.5V,V =5V,andf =1MHz,unlessotherwisenoted.
A REF SAMPLE
PARAMETER TESTCONDITIONS MIN TYP MAX UNIT
ANALOGINPUT
Full-scaleinputvoltage(1) +IN–(–IN)or(+INx–COM) 0 +VREF V
+IN,+IN0,+IN1 AGND–0.2 +VA+0.2
Absoluteinputvoltage V
–INorCOM AGND–0.2 AGND+0.2
Inputcapacitance 40 45 pF
Noongoingconversion,
Inputleakagecurrent –1 1 nA
dcinput
Atdc 109
Inputchannelisolation,ADS8330only dB
VI=±1.25VPPat50kHz 101
SYSTEMPERFORMANCE
Resolution 16 Bits
Nomissingcodes 16 Bits
INL Integral ADS8329IB,ADS8330IB –1.75 ±1.2 1.75 LSB(2)
linearity ADS8329I,ADS8330I –2.5 ±1.5 2.5
DNL Differential ADS8329IB,ADS8330IB –1 ±0.4 1 LSB(2)
linearity ADS8329I,ADS8330I –1 ±0.5 2
ADS8329IB,ADS8330IB –1 ±0.27 1
EO Offseterror(3) mV
ADS8329I,ADS8330I –1.25 ±0.8 1.25
Offseterrordrift FSR=5V +0.4 ppm/°C
EG Gainerror –0.25 –0.04 0.25 %FSR
Gainerrordrift +0.75 ppm/°C
Atdc 70
CMRR Common-moderejectionratio dB
VI=0.4VPPat1MHz 50
Noise 33 m VRMS
PSRR Power-supplyrejectionratio AtFFFFhoutputcode(3) 78 dB
SAMPLINGDYNAMICS
tCONV Conversiontime 18 CCLK
tSAMPLE1 Manualtrigger 3
Acquisitiontime CCLK
tSAMPLE2 Autotrigger 3
Throughputrate 1 MHz
Aperturedelay 5 ns
Aperturejitter 10 ps
Stepresponse 100 ns
Overvoltagerecovery 100 ns
(1) Idealinputspan;doesnotincludegainoroffseterror.
(2) LSBmeansleastsignificantbit.
(3) Measuredrelativetoanidealfull-scaleinput[+IN–(–IN)]of4.096Vwhen+VA=5V.
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ELECTRICAL CHARACTERISTICS (continued)
T =–40°Cto85°C,+VA=4.5Vto5.5V,+VBD=1.65Vto5.5V,V =5V,andf =1MHz,unlessotherwisenoted.
A REF SAMPLE
PARAMETER TESTCONDITIONS MIN TYP MAX UNIT
DYNAMICCHARACTERISTICS
THD Totalharmonicdistortion(4) VIN=5VPPat10kHz –102 dB
VIN=5VPPat100kHz –95
VIN=5VPPat10kHz 93
SNR Signal-to-noiseratio ADS8329/30IB 90 92 dB
VIN=5VPPat100kHz
ADS8329/30I 90
VIN=5VPPat10kHz 92
SINAD Signal-to-noise+distortion dB
VIN=5VPPat100kHz 90
VIN=5VPPat10kHz 105
SFDR Spurious-freedynamicrange dB
VIN=5VPPat100kHz 97
–3dBsmall-signalbandwidth 30 MHz
CLOCK
Internalconversionclockfrequency 21 22.9 24.5 MHz
UsedasI/Oclockonly 50
SCLKexternalserialclock MHz
AsI/Oclockandconversionclock 1 42
EXTERNALVOLTAGEREFERENCEINPUT
Input VREF[(REF+)–(REF–)] 5.5V≥+VA≥4.5V 0.3 +VA
VREF reference V
range (REF–)–AGND –0.1 0.1
Resistance(5) Referenceinput 40 kΩ
DIGITALINPUT/OUTPUT
Logicfamily—CMOS
VIH High-levelinputvoltage 5.5V≥+VBD≥4.5V 0.65×(+VBD) +VBD+0.3 V
0.35×
VIL Low-levelinputvoltage 5.5V≥+VBD≥4.5V –0.3 (+VBD) V
II Inputcurrent VI=+VBDorBDGND –50 50 nA
CI Inputcapacitance 5 pF
5.5V≥+VBD≥4.5V,
VOH High-leveloutputvoltage IO=100m A +VBD–0.6 +VBD V
5.5V≥+VBD≥4.5V,
VOL Low-leveloutputvoltage IO=100m A 0 0.4 V
CO Outputcapacitance 5 pF
CL Loadcapacitance 30 pF
Dataformat—straightbinary
POWER-SUPPLYREQUIREMENTS
Power-supply +VBD 1.65 3.3 5.5 V
voltage +VA 4.5 5 5.5 V
1-MHzSamplerate 7.0 7.8
mA
Supplycurrent NAP/Auto-NAPmode 0.3 0.5
Deeppower-downmode 4 50 nA
BufferI/Osupplycurrent 1MSPS 1.7 mA
+VA=5V,+VBD=5V 44 48
Powerdissipation mW
+VA=5V,+VBD=1.8V 35 39.5
TEMPERATURERANGE
TA Operatingfree-airtemperature –40 +85 °C
(4) Calculatedonthefirstnineharmonicsoftheinputfrequency.
(5) Canvary±30%.
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ELECTRICAL CHARACTERISTICS
T =–40°Cto85°C,+VA=2.7Vto3.6V,+VBD=1.65Vto1.5×(+VA),V =2.5V,f =1MHzfor3V≤+VA≤3.6V,
A REF SAMPLE
f =900kHzfor3V<+VA≤2.7Vusingexternalclock(unlessotherwisenoted)
SAMPLE
PARAMETER TESTCONDITIONS MIN TYP MAX UNIT
ANALOGINPUT
Full-scaleinputvoltage(1) +IN–(–IN)or(+INx–COM) 0 +VREF V
+IN,+IN0,+IN1 AGND–0.2 +VA+0.2
Absoluteinputvoltage V
–INorCOM AGND–0.2 AGND+0.2
Inputcapacitance 40 45 pF
Noongoingconversion,
Inputleakagecurrent –1 1 nA
DCInput
Atdc 108
Inputchannelisolation,ADS8330only dB
VI=±1.25VPPat50kHz 101
SYSTEMPERFORMANCE
Resolution 16 Bits
Nomissingcodes 16 Bits
ADS8329IB,
–1.75 ±1 1.75
INL Integrallinearity ADS8330IB LSB(2)
ADS8329I,ADS8330I –2.5 ±1.5 2.5
ADS8329IB,
DNL Differential ADS8330IB –1 ±0.5 1 LSB(2)
linearity
ADS8329I,ADS8330I –1 ±0.8 2
ADS8329IB,
–0.5 ±0.05 0.5
EO Offseterror(3) ADS8330IB mV
ADS8329I,ADS8330I –0.8 ±0.2 0.8
Offseterrordrift FSR=2.5V +0.8 ppm/°C
EG Gainerror –0.25 –0.04 0.25 %FSR
Gainerrordrift +0.5 ppm/°C
Atdc 70
CMRR Common-moderejectionratio dB
VI=0.4VPPat1MHz 50
Noise 33 m VRMS
PSRR Power-supplyrejectionratio AtFFFFhoutputcode(3) 78 dB
SAMPLINGDYNAMICS
tCONV Conversiontime 18 CCLK
tSAMPLE1 Manualtrigger 3
Acquisitiontime CCLK
tSAMPLE2 Autotrigger 3
Throughputrate 1 MHz
Aperturedelay 5 ns
Aperturejitter 10 ps
Stepresponse 100 ns
Overvoltagerecovery 100 ns
(1) Idealinputspan,doesnotincludegainoroffseterror.
(2) LSBmeansleastsignificantbit.
(3) Measuredrelativetoanidealfull-scaleinput[+IN–(–IN)]of2.5Vwhen+VA=3V.
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ELECTRICAL CHARACTERISTICS (continued)
T =–40°Cto85°C,+VA=2.7Vto3.6V,+VBD=1.65Vto1.5×(+VA),V =2.5V,f =1MHzfor3V≤+VA≤3.6V,
A REF SAMPLE
f =900kHzfor3V<+VA≤2.7Vusingexternalclock(unlessotherwisenoted)
SAMPLE
PARAMETER TESTCONDITIONS MIN TYP MAX UNIT
DYNAMICCHARACTERISTICS
THD Totalharmonicdistortion(4) VIN=2.5VPPat10kHz –102 dB
VIN=2.5VPPat100kHz –93
VIN=2.5VPPat10kHz 89
SNR Signal-to-noiseratio dB
VIN=2.5VPPat100kHz 88
VIN=2.5VPPat10kHz 88.5
SINAD Signal-to-noise+distortion dB
VIN=2.5VPPat100kHz 88
VIN=2.5VPPat10kHz 104
SFDR Spurious-freedynamicrange dB
VIN=2.5VPPat100kHz 94.2
–3dBsmall-signalbandwidth 30 MHz
CLOCK
Internalconversionclockfrequency 21 22.3 23.5 MHz
UsedasI/Oclockonly 42
SCLKexternalserialclock MHz
AsI/Oclockandconversionclock 1 42
EXTERNALVOLTAGEREFERENCEINPUT
fSAMPLE≤500kSPS, 0.3 2.525
2.7V≤+VA<3V
fSAMPLE≤500kSPS, 0.3 3
VREF[(REF+)– 3V≤+VA<3.6V
VREF Irnapnugtereference (REF–)] fSAMPLE>500kSPS, 2.475 2.525 V
2.7V≤+VA<3V
fSAMPLE>500kSPS, 2.475 3
3V≤+VA≤3.6V
(REF–)–AGND –0.1 0.1
Resistance(5) Referenceinput 40 kΩ
DIGITALINPUT/OUTPUT
Logicfamily—CMOS
VIH High-levelinputvoltage (+VA×1.5)V≥+VBD≥1.65V 0.65×(+VBD) +VBD+0.3 V
VIL Low-levelinputvoltage (+VA×1.5)V≥+VBD≥1.65V –0.3 0.35×(+VBD) V
II Inputcurrent VI=+VBDorBDGND –50 50 nA
CI Inputcapacitance 5 pF
(+VA×1.5)V≥+VBD≥1.65V,
VOH High-leveloutputvoltage IO=100m A +VBD–0.6 +VBD V
(+VA×1.5)V≥+VBD≥1.65V,
VOL Low-leveloutputvoltage IO=100m A 0 0.4 V
CO Outputcapacitance 5 pF
CL Loadcapacitance 30 pF
Dataformat—straightbinary
(4) Calculatedonthefirstnineharmonicsoftheinputfrequency.
(5) Canvary±30%.
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ELECTRICAL CHARACTERISTICS (continued)
T =–40°Cto85°C,+VA=2.7Vto3.6V,+VBD=1.65Vto1.5×(+VA),V =2.5V,f =1MHzfor3V≤+VA≤3.6V,
A REF SAMPLE
f =900kHzfor3V<+VA≤2.7Vusingexternalclock(unlessotherwisenoted)
SAMPLE
PARAMETER TESTCONDITIONS MIN TYP MAX UNIT
POWER-SUPPLYREQUIREMENTS
+VBD 1.65 +VA 1.5×(+VA) V
Power-supply
voltage +VA fs≤1MHz 3 3.6 V
fs≤900kHz 2.7 3.6
1-MHzsamplerate,
5.1 6.1
3V≤+VA≤3.6V
900-kHzsamplerate, mA
Supplycurrent 2.7V≤+VA≤3V 4.84
NAP/Auto-NAPmode 0.25 0.4
Deeppower-downmode 2 50 nA
BufferI/Osupplycurrent 1MSPS,+VBD=1.8V 0.05 mA
+VBD=1.8V,3V≤+VA≤3.6V 15.5 19
Powerdissipation mW
+VBD=1.8V,2.7V≤+VA≤3V 13.2
TEMPERATURERANGE
TA Operatingfree-airtemperature –40 +85 °C
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TIMING CHARACTERISTICS
Allspecificationstypicalat–40°Cto85°Cand+VA=+VBD=5V. (1)(2)
PARAMETER MIN TYP MAX UNIT
External,
0.5 21
f =1/2f
CCLK SCLK
f Frequency,conversionclock,CCLK MHz
CCLK
Internal,
21 22.9 24.5
f =1/2f
CCLK SCLK
t Setuptime,fallingedgeofCStoEOC 1 CCLK
su(CSF-EOC)
t Holdtime,fallingedgeofCStoEOC 0 ns
h(CSF-EOC)
t Pulseduration,CONVSTlow 40 ns
wL(CONVST)
t Setuptime,fallingedgeofCStoEOS 20 ns
su(CSF-EOS)
t Holdtime,fallingedgeofCStoEOS 20 ns
h(CSF-EOS)
t Setuptime,risingedgeofCStoEOS 20 ns
su(CSR-EOS)
t Holdtime,risingedgeofCStoEOS 20 ns
h(CSR-EOS)
Setuptime,fallingedgeofCStofirstfalling
t 5 ns
su(CSF-SCLK1F) SCLK
t Pulseduration,SCLKlow 8 t –8 ns
wL(SCLK) c(SCLK)
t Pulseduration,SCLKhigh 8 t –8 ns
wH(SCLK) c(SCLK)
I/OClockonly 20
I/Oandconversionclock 23.8 2000
tc(SCLK) Cycletime,SCLK I/OClock,chainmode 20 ns
I/Oandconversionclock,
23.8 2000
chainmode
Delaytime,fallingedgeofSCLKtoSDO
t 10-pFLoad 2 ns
d(SCLKF-SDOINVALID) invalid
Delaytime,fallingedgeofSCLKtoSDO
t 10-pFLoad 10 ns
d(SCLKF-SDOVALID) valid
Delaytime,fallingedgeofCStoSDO
t 10-pFLoad 8.5 ns
d(CSF-SDOVALID) valid,SDOMSBoutput
t Setuptime,SDItofallingedgeofSCLK 8 ns
su(SDI-SCLKF)
t Holdtime,SDItofallingedgeofSCLK 4 ns
h(SDI-SCLKF)
Delaytime,risingedgeofCS/FStoSDO
t 5 ns
d(CSR-SDOZ) 3-state
Setuptime,16thfallingedgeofSCLK
t 10 ns
su(16thSCLKF-CSR) beforerisingedgeofCS/FS
Delaytime,CDIhightoSDOhighindaisy
t 10-pFLoad,chainmode 16 ns
d(SDO-CDI) chainmode
(1) Allinputsignalsarespecifiedwitht =t =1.5ns(10%to90%ofV )andtimedfromavoltagelevelof(V +V )/2.
r f DD IL IH
(2) Seetimingdiagrams.
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TIMING CHARACTERISTICS
Allspecificationstypicalat–40°Cto85°C,+VA=2.7V,+VBD=1.8V(unlessotherwisenoted) (1)(2)
PARAMETER MIN TYP MAX UNIT
External,3V≤+VA≤3.6V,
0.5 21
f =1/2f
CCLK SCLK
External,2.7V≤+VA≤3V,
f Frequency,conversionclock,CCLK 0.5 18.9 MHz
CCLK f =1/2f
CCLK SCLK
Internal,
20 22.3 23.5
f =1/2f
CCLK SCLK
t Setuptime,fallingedgeofCStoEOC 1 CCLK
su(CSF-EOC)
t Holdtime,fallingedgeofCStoEOC 0 ns
h(CSF-EOC)
t Pulseduration,CONVSTlow 40 ns
wL(CONVST)
t Setuptime,fallingedgeofCStoEOS 20 ns
su(CSF-EOS)
t Holdtime,fallingedgeofCStoEOS 20 ns
h(CSF-EOS)
t Setuptime,risingedgeofCStoEOS 20 ns
su(CSR-EOS)
t Holdtime,risingedgeofCStoEOS 20 ns
h(CSR-EOS)
Setuptime,fallingedgeofCStofirst
t 5 ns
su(CSF-SCLK1F) fallingSCLK
t Pulseduration,SCLKlow 8 t –8 ns
wL(SCLK) c(SCLK)
t Pulseduration,SCLKhigh 8 t –8 ns
wH(SCLK) c(SCLK)
Allmodes,
23.8 2000
3V≤+VA≤3.6V
t Cycletime,SCLK ns
c(SCLK)
Allmodes,
26.5 2000
2.7V≤+VA<3V
Delaytime,fallingedgeofSCLKtoSDO
t 10-pFLoad 7.5 ns
d(SCLKF-SDOINVALID) invalid
Delaytime,fallingedgeofSCLKtoSDO
t 10-pFLoad 16 ns
d(SCLKF-SDOVALID) valid
10-pFLoad,
13
Delaytime,fallingedgeofCStoSDO 2.7V≤+VA≤3V
t ns
d(CSF-SDOVALID) valid,SDOMSBoutput 10-pFLoad,
11
3V≤+VA≤3.6V
t Setuptime,SDItofallingedgeofSCLK 8 ns
su(SDI-SCLKF)
t Holdtime,SDItofallingedgeofSCLK 4 ns
h(SDI-SCLKF)
Delaytime,risingedgeofCS/FStoSDO
t 8 ns
d(CSR-SDOZ) 3-state
Setuptime,16thfallingedgeofSCLK
t 10 ns
su(16thSCLKF-CSR) beforerisingedgeofCS/FS
Delaytime,CDIhightoSDOhighin
t 10-pFLoad,chainmode 23 ns
d(SDO-CDI) daisychainmode
(1) Allinputsignalsarespecifiedwitht =t =1.5ns(10%to90%ofV )andtimedfromavoltagelevelof(V +V )/2.
r f DD IL IH
(2) Seetimingdiagrams.
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PIN ASSIGNMENTS
ADS8329 ADS8330
RSAPACKAGE RSAPACKAGE
(TOPVIEW) (TOPVIEW)
-REF AGND -IN +IN -REF AGND COM +IN0
6 5 4 3
1 1 1 1 6 5 4 3
1 1 1 1
REF+ (REFIN) 1 12 RESERVED REF+ (REFIN) 1 12 +IN1
NC 2 11 +VA NC 2 11 +VA
CONVST 3 10 +VBD CONVST 3 10 +VBD
EOC/INT/CDI 4 9 SCLK EOC/INT/CDI 4 9 SCLK
5 6 7 8
5 6 7 8
FS/CS SDI SDO BDGND FS/CS SDI SDO DGND
B
CAUTION: The thermal pad is internally connected to the substrate. This pad can be connected to the analog
groundorleftfloating.Keepthethermalpadseparatefromthedigitalground, ifpossible.
ADS8329 ADS8330
PWPACKAGE PWPACKAGE
(TOPVIEW) (TOPVIEW)
+VA 1 16 +VBD +VA 1 16 +VBD
RESERVED 2 15 SCLK +IN1 2 15 SCLK
+IN 3 14 BDGND +IN0 3 14 BDGND
-IN 4 13 SDO COM 4 13 SDO
AGND 5 12 SDI AGND 5 12 SDI
REF- 6 11 FS/CS REF- 6 11 FS/CS
REF+ (REFIN) 7 10 EOC/INT/CDI REF+ (REFIN) 7 10 EOC/INT/CDI
NC 8 9 CONVST NC 8 9 CONVST
NC=Nointernalconnection
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