IS 15215: Performance Guide Manual for Single- and Double-Sided Flexible Printed Wiring Boards

100 Pages·2002·6.6 MB·English

by  Bureau of Indian Standards

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IS 15215 (2002): Performance Guide Manual for Single- and
Double-Sided Flexible Printed Wiring Boards [LITD 5:
Semiconductor and Other Electronic Components and Devices]
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IS 15215:2002
lEC/PAS 62123 (1999)

Indian Standard
PERFORMANCE GUIDE MANUAL FOR
SINGLE- AND DOUBLE-SIDED FLEXIBLE
PRINTED WIRING BOARDS
lCS 31.180

0 BIS 2002
BUREAU OF INDIAN STANDARDS
MANAK BHAVAN, 9 BAHADUR SHAH ZAFAR MARG
NEW DELHI 110002
November 2002 Price Rs 500.04
Printml Circuits Sectional Committee, LTD 17
NATIONAL FOREWORD
This Indian Standard which is identical with IEC/PAS 62123:1999 ‘Performance guide manual for single- and
double-sided flexible printed wiring boards’ issued by the International Electrotechnical Commission (IEC) was
adopted by the Bureau of Indian Standards on the recommendation of Printed Circuits Sectional Committee and
approval of the Electronics and Telecommunication Division Council.
The text of the lEC/PAS document has been approved as suitable for publication as Indian Standard without
deviations, Certain conventions are, however, not identical to those used in Indian Standards. Attention isparticu-
larly drawn to the following:
a) Wherever the words ‘International Standard’ appear referring to this standard, they should be read as
‘Indian Standard’.
b) Comma (,) has been used as adecimal marker while inIndian Standards, the current practice isto use
a point (.) as the decimal marker.
CROSS REFERENCES
The technical committee responsible for the preparation of this standard has reviewed the provisions of the follow-
ing international Standards and has decided that they are acceptable for use in conjunction with this standard :
JIS C 5016 (1994) Test methods for flexible printed wiring boards
JIS C 5017 (1994) Flexible printed wiring boards – single-sided and double-sided
JIS C 5603 (1993) Terms and definitions for printed circuits
JISC 6471 (1995) Test methods of copper-clad laminates for flexible printed wiring boards
JIS C 6472 (1995) Copper-clad laminates for flexible printed wiring boards (polyester film, polyimide
film)
JISC6512 (1992) Electrolytic copper foil for printed wiring boards

JISC 6513(1996) Rolled copper foil for printed wiring boards

JPCA-FC03 (1992) Specification for external appearance of flexible printed wiring boards
IEC 326-7 (1981) Printed boards – Part 7: Specification for single and double sided flexible printed
boards without through connections
IEC 326-8 (1981) Printed boards – Part 8: Specification for single and double sided flexible printed
boards with through connections
ANSUIPC-FC-250 Specification for single- and double-sided flexible printed wiring
IPC-A-60() .Acceptability of printed boards
lPC-TM-650 Test methods manual
2.4.13 Solder flat resistance – Flexible printed wiring materials
IS 15215:2002
lEC/PAS 62123(1999)
Table of Contents
,.
SCOPE ......................................................................... 1 8.9.4 Registration of Stiffener to FPC ....................... 13
8.9.5 Registration of Punched Outline to
2 REFERENCED DO(XJMENTS .................................... 1
Conductor Patterns .............................................. 13
2.1 Japan Printed Circuits Assocation I ..................... 1
8.10 Registration of Pressure %nsitivc or Heat
2.2 Intcmaiional Elcctrotcchnical Commission .......... 1 Activated Adhesives (Including Adhesive
2.3 IPC ......................................................................... 1 Squeeze-Out) to Flexible Printed Board
and Stiffener ........................................................ 13
3 DEFINITION OF TERMS..., ......................................... 1
8.11 Plating Thickness of Copper Plated-
Through Holes ..................................................... 13
4 TEST METHODS ......................................................... 1
9 TESTING OF ELECTRICAL PERFORMANCE ...... 13
5 PERFORMANCE LEVELS .......................................... 1
10 TESTING OF MECHANICAL PERFORMANCE ..<.13
6 BASE MATERIALS ..................................................... 2
11 ENVIRONMENTAL PERFORMANCE ..................... 13
7 VISUAL INSPECTION ................................................ 2
7.1 Test Environment .................................................. 2 12 MIGRATION ............................................................. 13
7.2 Test Specimens ...................................................... 2
13 CHEMICAL RESISTANCE ..................................... 14
7.3 Tools for TesLing ................................................... 2
7.4 %cparalion of Limit Samples ............................... 2 14 Cleanliness ........................................................ ]4
7.5 Description of Inspections .................................... 2
15 FLAME Resistance ............................................. 14
7.5.1 Visual Inspection of Conductors .......................... 2
16 MARKING, PACKAGING, AND STORAGE ........... 16
7.5.2 Visual Inspection of Base Film ........................... 3
16.1 Markhtg on Products ......................................... ]6
7.5.3 Visual Inspection of Coverlay and Covercoat ....4
16.2 Marking on Package .......................................... 16
7.5.4 Visual Inspection of Plating ................................ 6
16.3 Packaging and Storage ...................................... 16
7.5.5 VisuaI Inspection of Edges of Outline
and Holes ............................................................. 8 16.3.1 Packaging ............................................................ 16
7..5.6 Visual Imperfections Related to 16.3.2 Storage ................................................................. 16
Stiffener Bonding ................................................. 8
16.3.3 Handling ............................................................,. 16

7.5.7 Other Visual Inspection .................... .................. 10
Appendix I ................................................................... 17
8 DIMENSIONAL INSPECTIONS ............................... 11
8.1 Measurement of Dimensions .............................. 11 Appendix II .................................................................. 18
8.2 Ex[cmal dimensions ............................................ ]] Appendix 111 .................................................................20
8.3 ~ickncss ............................................................. II
8.4 Holes .................................................................... 11
Figures
8.4.1 Component Holes ................................................ 11
Figure 1 Nicksand PinholesinCtmductor......................2
8.4.2 Vias ...................................................................... 11
Figure2 Reduced Area onLand,.....................................2
8.4.3 Mounting Holes... ................................................ 11
Figure3 circumferential Voidatthe Component
8.5 Conductor Widths ................................................ 11 Hole Corner .......................................................3
8.6 Clearances Bctwecn Conductors ........................ 11 Figure4 Extraneous Copper Between Conductors/
8.7 Distancc Between Hoic Ccnte~ ......................... 11 Spursand NodulesofConductorsCorner........3
Figure5 ExtraneousCopper and Spursand
8.8 Minimum Distance Between Board Edges
Nodules inOpenArea and Nodules of
and Conductors .................................................... 11
ConductorsCorner............................................4
8.9 Positional Accuracy ........................................... ]]
Figure6 ‘Etchedconcave on ConductorSurface and
8.9.1 Positional Accuracy of Holes ............................. II Nodules ofConductorsCorner..,,..,..,,.,..., .........4
8.9.2 Registration of Hole to Land, ............................. 12 Figure7 ConductorDelamination...,,,..,...,......,,.,..,.,..,,.,,, 4
8.9.3 Rcgistratic;n of Covcrlay (or Covercoat) Figure8 Scratches onConductor.....................................4
to Land ................................................................ 12 Figure9 Dents..................................................................5
I
IS 15215:2002
lEC/PAS 62123(1999)
Figure 10 Scratch on Base Film ........................................5 Table 8 Dents ....................................................................5
Figure 11 Allowable Voids...................................................6 Table 9 Allowable Scratches on Base Film .....................5
Figure 12 Foreign Matiers ..................................................7 Table 10 Dents on Coverlay and Covercoat .......................5
Figure 13 Lifting and Delamination of Co\;erlay Table 11 Requirements for Scratches
and Covercoat ......... ......................................7 on Coverlayer and Covercoat ..............................5
Figure 14 Allowable Squeeze-Out of Coverlay Table 12 Allowable Voids ....................................................6
Adhesive and Ooze-Out of Covercoat ..............7 Table 13 Allowable Non-Conductive
Figure 15 Plating Defects ...................................................8 Foreign Materials (mm) ........................................ 7
Figure 16 Penetration of Plated Metal or Solder ...............9 Table 14 Allowable Squeeze-Out of Coverlay Adhesive
and Ooze-out of Covercoat .................................. 7
Figure 17 Plating Voids in Plated-Through Hole ...............9
Table 15 Minimum Solderable Annular Ring
Figure 18 Tears and Nicks .................................................9
on Land Area ........................................................8
Figure 19 Burrs ....... ............. .. ......... ..................... 10
Table 16 Gold Plating ..........................................................8
Figure 20 Thready Burrs .................................................. 10
Table 17 Requirements for Metal Penetration Between
Figure 21 Foreign Matter Between Board Conductor and Coverlay ...................................... 9
and Stiffener ..................................................... 10
Table 18 Requirements for Metal Penetration Between
Figure 22 Voids Between Board and Stiffener ................. 11 Conductor and Base Film ....................................9
Figure .23 Cracks .............................................................. 11 Table 19 Gold Plating ..........................................................9
Figure 24 Chip.Off ............................................................ 12 Table 20 Allowable Plating Voids ........................................9
Figure 25 Protrusions and Dents ,onFlexible Table 21 cmcb .................................................................11
Printed B.oard................................................... 12
Table 22 Thermosetting Adhesives on Surface ................12
Figure 26 Bow and Twist ................................................ 12
Table 23 Flux Residue on Surface .................................... 12
Figure 27 Misregistration of Hole and Land .................... 14
Table 24 Residue of Metal Powders
Figure 28 Misregistration of Land and Coverlay (Solder, Aluminum, Copper, Etc.) ....................... 12
(or Covercmt) .................................................. 14
Table 25 Residue. ofAdhesive .......................................... 12
Figure 29 Registration of Holes ....................................... 14
Table 26 Tolerance of External Dimension ....................... 13
Figure 30 Registration of Outlines ................................... 14
Table 27 Requirements for Holes ..................................... 13
Figure 31 Registration of Pressure Sensitive or Heat
Table 28 Requirements for Via. ......... ............................. 13
Activated Adhesives from Flexible Printed
Board and Stiffener (Including Adhesive Table 29 Conductor Widths and Tolerances (mm) ...........13
Squeeze.Out) ................................................... 15 Table 30 Conductor Clearances and Tolerances (mm) ....13
Table 31 Tolerance of Distance Between Hole Centers ... 13

Table 32 Minimum DkNance between Board Edges
Tables

and Conductor .................................................. 13
Table 1 Allowable Nicks and Pinholes ..............................2 Table 33 Allowable Misregistration of Outlines .................14
Table 2 Allowable Extraneous Copper and Spurs Table 34 Registration of Punched Outline to
and Nodules Between Conductors ......................3 Conductor Patterns ............................................ 14
Table 3 Allowable Etched Concave on Table 35 Electrical Properties of Flexible
Conductor Surface ..............................................4 Printed Boatis .................................................... 15
Table 4 Allowable Conductor Delamination ......................4 Table 36 Mechanical Properties of Flexible
Table 5 Allowable Scratches cmConductor ......................4 Printed Boatis ..................................................... 15
Table 6 Allowable Dents .....................................................5 Table 37 Environmental Tests and Requirements ............16
Table 7 Discoloration .........................................................5 Table 38 Requirements for Packaging .............................. 16

ii
IS 15215:2002
lEC/PAS 62123(1999)
Indian Standard
PERFORMANCE GUIDE MANUAL FOR
SINGLE- AND DOUBLE-SIDED FLEXIBLE
PRINTED WIRING BOARDS
1 SCOPE printed boards without through connec-
This standard covbrs [hc rcquircmcnts and considerations tions.
for single- and dotiblc-sicicd flexible printed wiring boards
IEC 326-8 (1981) Printed Boards Part 8: Spccificalion
(hcrcinaftcr called “flexible printed boards” or FPC).
for single and double sided Ilcxiblc
In this document, a FPC means a single- or double-sided printed boards wilh through conncc-
FPC, using a film ofpolycster or polyimidc laminated with tions.
copper foil(s) on onc or both sides (including types with no
Thcse IEC documents are, however, being reviewed for
adhesive layer), and manufactured by the subtractive
substantial revision at the time of cnactmcnt of this docu-
method (excluding the build-up methods for the manufac-
ment.
turing process).
2.3 IPC3
2 REFERENCED DOCUMENTS
The referenced documents for this standard arc as stated in ANWIPC-FC-250 Specification for Single- and Double-
2.1 through 2.3. Sidcd Flexible Printed Wiring
2.1 Japan Printed Circuits Assocationq IPC-A-600 Acceptability of Printed Boards
JIS C 5016 (1994) Test Methods for Flexible Printed Wir- IPC-TM-650 Test Methods Manual
ing Boards
2.4.13 Solder Float Resistance Flexible Printed Wiring
Materials
JIS C 5017 (1994) Flexible Printed Wiring Boards -
Singic-Sided and Double-Sided
3 DEFINITION OF TERMS
JIS C 5603 (1993) Terms and Definitions for Printed Cir- The definition of terms used in this document is in con-
cuits formance with JIS C 5603, JIS C 5017, JIS C 5016, and
JPCA-FC03.
JIS C 6471 (1995) Tes~ Methods of Copper-Clad Lami-

nates for Flexible Printed Wiring 4 TEST METHODS

Boards
The test methods for the properties spccificd in this docu-
ment arc, in principle, in conformance with JIS C 5016.
JIS C 6472 (1995) Copper-Clad Laminates for Flexible
provided:
Printed Wiring Boards (Polyester Film,
Polyimide Film) (1) Test methods requiring complicated rcfcrcncing proce-
dures are reproduced in this document.
JIS C 6512 (1992) Electrolytic Copper Foil for Prinled
(2) Tests on through connection apply to double-sided
Wiring Boards
FPCS only.
JIS C 6513 (1996) Rolled Copper Foil for Printed Wiring (3) For stitiencrs affixed to FPCS, cxtcmal appearance is
Boards the only rcquircmcnt spccificd in this document.
JPCA-FC03 (1992) Specification for External Appearance 5 PERFORMANCE LEVELS
of Flexible Printed Wiring Boards The FPCS are classified into three standard icvcls and onc
special level regarding their performance for each rcquirc-
2.2 International Electrotechnical Commission mcnt. These are defined as follows:
IEC 326-7(1981) Printed Boards. Part 7: Specification Level 1 – FPCS requiring “ordinary” performance .Icvcls
for single and double sided flexible Level 2 – FPCS requiring “high” pcrfonnancc Icvcls
1.JPCA,Ka!roKaikan2F,12-2,Nishlogikita3-Chome, Sugmami-Ku,Tokyo,167,Japan,+61-3-531O-2O2Ow,ww.lPca.0r9
2.ANSI,11W.42ndSt.,NewYork,NY10036,212-642-4980, www.ansi.org
3.IPC,2215SandersRd.,Norlhbrook,IL60062-6135,647-509-9700,www.Ipcorg
i
IS 15215:2002
lEC/PAS 62123(1999)
Level 3 – FPCS requiring “extra-high” performance - 7.5.1 Visual Inspection of Conductors Conductors hav-
levels ing widths <0.15 mm, as well as other conductors with
Level X - FPCS requiring special performances, which do particular requirements, such as bonding area of FPCS for
not belong to the three quality levels mentioned wire bonding use, may be excluded from application of the
above, and the specifications for which must be specifications described in this document, when agreed
clearly defined between manufacturer and cus- upon by manufacturer and customer.
tomer.
7.5.1.1 Open and Short Circuits There shall be no open
These levels hold valid throughout this document and can
and/or short circuits on FPCS.
be used by selecting an appropriate level for each require-
ment. On the other hand, in a FPC that partially contains
7.5.1.2 Nicks and Pinholes on Conductors
special requirement(s) such as fine circuits, applications of
(1) The allowable width (wI) and length (1)of nick(s) and
flexing use, and COFS. including wire bonding and flip-
pinhole(s) on conductors reducing conductor width,
chip packaging, Level X can only apply to the area of these
as shown in Figure 1, shall meet the requirements
special requirements. The requirements that are not speci-
of Table 1 for &e finished conductor width (W) (see
fied for each level apply to Level 1, Level 2, and Level 3.
Note 1).
6 BASE MATERIALS Table 1 Alloweble Nicks snd Pinholea
The base materials used for FPCS shall be the materials of I Lsvel I Nicke and Pinholes I
polyester film or polyimide film specified in JIS C 6472,
which are laminated, by the use of an adhesive or other
bonding methods, with a copper foil for printed boards
specified in JIS C 6512 and JIS C 6513, or with a copper Note 1: The width of finished conductors shall be mea-
foil having a performance equivalent to that; and their sured at the bottom of the conductor.
properties shall be in accordance with the requirements of
(2) The void area on a land, as shown in Figure 2, shall
JIS C 6472.
not exca% 10% of the effective exposed land area.
(3) The circumferential void at the hole corner of a com-
7 VISUAL INSPECTION
ponent hole, as shown in Figuk 3, shall not exceed ~3
7.1 Test Environment The testing environment shall be of the total circumference.
in accordance with the requirements of JIS C 5016, para-
graph 3, “Test Conditions. ” W1
7.2 Test Specimens The specimens u sed shall be in
accordance with the requirements of JIS C 50 16, paragraph

4, “Test Specimens. ”
7.3 Tools for Testing A magnifying glass having a mag-
nification of’3X to 10X shall be used for examining the
appearance and surface finish conditions of the product.
Dimensions shall be measured with a graduated loupe or a
two-dimensional coordinate measuring instrumen~ if nec- Figure 1 Nicke and Pinholaa in Conductor
essary. Thickness shall be measured with a micrometer
having an accuracy of 1 & or higher.
7.4 Preparation of Limit Samples For smooth applica-
tion of this document, the limit samples showing the
required criteria to make technical judgments may be pre-
pared under agreement between manufacturer and cus-
tomer.
7.5 Description of Inspections Requirements, proce-
I
dures, and illustrations for visual inspections are given in
figure 2 Raduoad Ares on Land
7.5.1 through 7.5.7.4. Requirements that are not designated
for a specific performance level shall apply to performance

Level 1, Level 2, and Level 3.
2
IS 15215:2002
lEC/PAS 62123(1999)
Table 2 Allowable Extraneous Copper and Spurs and
Nodules Between Conductors
I Level I Extraneous Cormer/Stwrs and Nodules I
I land2 I a or (al + a2) >7/zb I
131 a or (al + a2) 22/sb I
7.5.1.8 Scratches on Conductor A scratch on a conduc-
tor surface, as shown in Figure 8, indicates the ones made
by a sharp metal end and arc harmful to the pcrforrnancc
of the printed circuit. The depth (f) of a scratch shall meet
Figure 3 Circumferential Void at the Component Hole the requirements of Table 5 relative to the conductor thick-
Corner ness (t). Further, the scratch shall not advcrscl y affect the
bending property of the rcpcatcdly flexing portitm.
7.5.1.3 Extraneous Copper Between Conductors I
Spurs and Nodules of Conductor The spacing (a) or (a]
+ a2) in Figure 4 shall meet the requirements of Table 2 7.s.1.9 Dents Dents on a conductor, as shown in Figure
relative to the finished conductor spacing (b); where (a) is 9, shall meet the requirements of Table 6. Dent conditions
the peak to peak spacing between spurs and nodules of arc usually diff~cult to judge (i.e., shape, size, and depth);
conductors, and (al ) and (a2) is the spacing between an accordingly, details should bc agreed upon between manu-
extraneous copper and its neighboring conductors. facturer and customer with limit samples prepared for these
evacuations.
7.5.1.4 Extraneous Copper Between Conductors/Spurs
and Nodules of Conductor in Open Area In an open area 7.5.1.10 Discoloration Discoloration shall meet the
where no conduc~or pattern is routed, as shown in.Flgurc requirements of Table 7.
5, the spacing (c) between the board edges and the extra-
neous copper or spurs and nodules shaU not be <0.125 7.5.2 Visual Inspection of Base Film
mm. The spacing (d) between the neighboring conductor
and the extraneous copper or the spurs and nodules shall 7.5.2.1 Dents Dents on the base film, as shown in Fig-
not be <0.125 mm. ure 9, shall meet the requirements of Table 8.
7.5.1.5 Etched Concave on Conductor Surface Etched 7.5.2.2 Scratches on Base Film The depth (i) of a
scratch on a base film relative to the film thickness (t),
concave areas (c) on the conductor surface relative to the
as shown in Figure 10, shall meet the requirements of
conductor thickness (t), shown in Figure 6, shall meet the
requirements of Table 3. The concave area shall not run Table 9.

across the width of a conductor.
There shall be no sharp pressed mark, cut, tear, and

delaminated adhesive layer. Further, these defects shall not
7.5.1.6 Conductor Delamination The width (w1) and adversely affect the bending property of the repeatedly
length (1) of a conductor delamination relative’ to the fm-
flexing part.
ishcd conductor width (W), as shown in Figure 7, shall
meet the requirements of Table 4.
7.5.1.7 Conductor Cracks There shall be no cracks in
the conductor.
b
Figure 4 Extraneous Copper Between Conductors/Spurs and Nodules of Conductors Corner

3