ebook img

Integrated Circuit Test Engineering: Modern Techniques PDF

380 Pages·2005·2.841 MB·English
Save to my drive
Quick download
Download
Most books are stored in the elastic cloud where traffic is expensive. For this reason, we have a limit on daily download.

Preview Integrated Circuit Test Engineering: Modern Techniques

Integrated Circuit Test Engineering Ian A. Grout Integrated Circuit Test Engineering Modern Techniques With149Figures 123 IanA.Grout,PhD DepartmentofElectronicandComputerEngineering UniversityofLimerick Limerick Ireland BritishLibraryCataloguinginPublicationData Grout,Ian Integratedcircuittestengineering:moderntechniques 1.Integratedcircuits-Verification I.Title 621.3’81548 ISBN-10:1846280230 LibraryofCongressControlNumber:2005929631 ISBN-10: 1-84628-023-0 e-ISBN:1-84628-173-3 Printedonacid-freepaper ISBN-13: 978-1-84628-023-8 ©Springer-VerlagLondonLimited2006 HSPICE®istheregisteredtrademarkofSynopsys,Inc.,700EastMiddlefieldRoad,MountainView, CA94043,U.S.A.http://www.synopsys.com/home.html MATLAB®istheregisteredtrademarkofTheMathWorks,Inc.,3AppleHillDriveNatick,MA01760- 2098,U.S.A.http://www.mathworks.com Verifault-XL®,Verilog®andPSpice®areregisteredtrademarksofCadenceDesignSystems,Inc.,2655 SeelyAvenue,SanJose,CA95134,U.S.A.http://www.cadence.com/index.aspx T-Spice™isthetrademarkofTannerResearch,Inc.,2650EastFoothillBlvd.Pasadena,CA91107,U.S.A. http://www.tanner.com/ Apartfromanyfairdealingforthepurposesofresearchorprivatestudy,orcriticismorreview,as permittedundertheCopyright,DesignsandPatentsAct1988,thispublicationmayonlybereproduced, stored or transmitted, in any form or by any means, with the prior permission in writing of the publishers,orinthecaseofreprographicreproductioninaccordancewiththetermsoflicencesissued bytheCopyrightLicensingAgency.Enquiriesconcerningreproductionoutsidethosetermsshouldbe senttothepublishers. Theuseofregisterednames,trademarks,etc.inthispublicationdoesnotimply,evenintheabsenceof aspecificstatement,thatsuchnamesareexemptfromtherelevantlawsandregulationsandtherefore freeforgeneraluse. Thepublishermakesnorepresentation,expressorimplied,withregardtotheaccuracyoftheinfor- mationcontainedinthisbookandcannotacceptanylegalresponsibilityorliabilityforanyerrorsor omissionsthatmaybemade. Typesetting:Camerareadybyauthor Production:LE-TEXJelonek,Schmidt&VöcklerGbR,Leipzig,Germany PrintedinGermany 987654321 SpringerScience+BusinessMedia springeronline.com This book is dedicated to Jane. Test A procedure intended to establish the quality, performance or reliability of something, especially before it is taken into widespread use. New Oxford English Dictionary About the Author Ian Grout is a lecturer within the Department of Electronic and Computer Engineering at the University of Limerick, Ireland. He was born in London, UK in 1967, and earned his PhD from Lancaster University in 1994. He has worked within the microelectronics field for several years, in particular Integrated Circuit test research and education. He has been a lecturer at Limerick since 1998. ix Preface The extensive use of electronic products in everyday life has only been made possible with the advent of, and substantial advances in, the field of microelectronic circuit engineering. The types of microelectronic circuits that can be developed today provide for a complex circuit behaviour within a physically small package. The advent of high-value, high-functionality portable electronic systems such as the laptop computer, mobile phone and Personal Digital Assistant (PDA), are testament to this. Since the successful demonstration of the transistor back in 1947 by Bardeen, Brattain, and Shockley at Bell Laboratories (USA), in just over half a century the ability to create microelectronic circuits containing tens of millions of transistors is a remarkable statement of achievement. The trend towards increases in design complexity and speed of operation, coupled with the need for improvements in the engineering processes utilised in order further to reduce product costs, is leading to improvements in all aspects of device design, fabrication and test. It is the field of test engineering that this book aims to identify and discuss. With the increased demands placed on test engineering activities within the electronic, and in particular microelectronic, circuit and system development and production (manufacturing) environments, the need to consider the importance of developing the right circuit/system test procedure is critical to the commercial success of a developed product. Test and evaluation activities provide an essential input to the product development at a range of stages within a product development cycle in that they: • Provide insight into a design development activity from concept through to implementation in order to ensure that the design can be adequately tested once it has been manufactured/fabricated. • Ensure devices that contain circuit faults due to problems with either the design or fabrication are not perceived as “good devices”. xi xii Preface • Provide the means to evaluate the operation of the design over a range of operating conditions that may be encountered in a final application. • Determine and guarantee the operating specifications that will be required by the end-user. • Allow for failures to be identified and the causes of the failures to be fed- back to design and fabrication for appropriate corrective action to be undertaken in order to eliminate the sources of the identified failures, and reduce the risk of faulty devices being passed onto the customer. The important role of test engineering is now widely acknowledged, such that the test procedure (program) development process is now considered of equal importance to that of design. Test requirements, once seen in many cases as an afterthought and considered only once a design had been generated, are now in many cases a prerequisite to the design activity, and test is now an active process from design concept identification and specification through to high-volume fabrication of the final product. This is due to a number of factors including the: • Rapid increase in design complexity, particularly for digital systems (more functionality per mm2 of silicon area). • Utilisation of new fabrication processes (reduced geometries allowing for the creation of smaller devices but which may suffer from fabrication process variation problems leading to new device failure modes and an increase in the fabricated device parameter variability). • Increase in design performance (higher operating frequencies, greater demands on design specifications). • Need for more competitive products (the customer receiving devices with superior performance at lower cost, given the availability of a greater number of suppliers of the necessary technology). • Need to test the operation of the fabricated device in a cost-effective manner with the available test equipment, without the requirement to acquire and utilise prohibitively high-cost test equipment. • Need to enable the device to run self-test algorithms once in the final application using additional circuitry built into the design (BIST: Built-In Self-Test), and for this type of self-test to be independent of external circuitry. Over the last few years, the evolution of test has brought it closer to design, bridging the “traditional” gap between design and test. Here, where once the design and test activities were separate and distant in many aspects ranging from the ultimate “end product” to the terminology used, the gap has been bridged with Preface xiii a unified “Design for Testability” (DfT) – sometimes referred to as “Design for Test” - approach. Specialist engineers in design and test are supported with a more generalist DfT engineer providing the ability to bridge the gap, but not necessarily required to be a specialist in either field – the need for specialists is based on the need for in-depth knowledge of specific design and test issues, roles which a single person could not realistically be expected to undertake. The gap between design and test expertise, leading to potential problems in a product development process, is being replaced with this “Design for Testability” (DfT) link, providing the bridge between the experts. This is coupled with the traditional boundary between digital and analogue electronic circuits, a nice and neat separation of behaviour into logic and voltage/current for design and analysis purposes, being eroded by the requirements for true mixed-signal device operation. Digital, analogue and mixed- signal DfT for devices ranging from a single operational amplifier through to the latest generation microprocessor is a complex task requiring substantial knowledge of design, test and the implications of both aspects on the other. The purpose of this book is to discuss the range of requirements placed on the test engineering activities and the test engineer within the rapidly changing microelectronic circuit engineering environment, and to identify the methods available to solving a range of test problem scenarios. The book is presented as follows: Chapter 1 provides an introduction to the role of test within the electronic/microelectronic engineering environment and highlights a number of key trends. The trends in test are highlighted, along with an overview of key actions. Chapter 2 provides an overview of the key fabrication processes. Whilst not aimed at being an exhaustive review of the field, it is aimed at identifying key aspects relating to test program development, in particular those relating to process induced circuit failure modes and test program development following a defect oriented approach. Chapter 3 overviews test program development for digital logic, both combinational logic and sequential logic. The principles identified here are relevant for later discussions into System on a Chip (SoC) test program development. Chapter 4 introduces semiconductor memory structures and test procedures. Traditionally, memories have been discrete packaged devices which, when utilised with a suitable processor, develop the basic operation of a computer system. Increasingly, the move towards higher levels of integration is leading to memories being provided as macro cells for placement alongside other circuitry on the same silicon die, leading towards System on a Chip (SoC) and System in Package (SiP) solutions that require extensive use of memory.

See more

The list of books you might like

Most books are stored in the elastic cloud where traffic is expensive. For this reason, we have a limit on daily download.