IEE proceedings. G, Electronic Circuits and Systems 1991: Vol 138 Index

9 Pages·1991·2.6 MB·English

THE INSTITUTION
OF ELECTRICAL
ENGINEERS
IEE
IEE PROCEEDINGS-G
Circuits, Devices and Systems
Vol. 138, 1991
Published by
The IEE, Savoy Place, London WC2R OBL, United Kingdom
Publishing Department: Michael Faraday House, Six Hills Way, Stevenage, Herts. SG1 2AY, United Kingdom
IEE Proceedings-G
Circuits, Devices and Systems
The Institution of Electrical Engineers, Savoy Place, London WC2R OBL, United Kingdom
Publishing Department: Michael Faraday House, Six Hills Way, Stevenage, Herts. SG1 2AY,
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Volume 138 1991 UK ISSN 0956-3768
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Dr. S.S. Lawson (University of Warwick)
Prof. P.H. Saul (Plessey Research Ltd)
Pages in issues of /EE Proceedings-G, 1991
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145-288 April
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Index
ABBREVIATIONS
paper, address or lecture
discussion on a paper
IEE Proceedings-G abstract of paper or address
Circuits, Devices and Systems errata
Vol. 138, 1991
Author index Bonek, E., Kreuzgruber, P., Scholtz, A.L., and El-Masry, E.I., and Vallee, R.E. see Vallee, RE.
Osterreicher, J. see Kreuzgruber, P. Eswaran, C., Venkateswarlu, T., and Antoniou, A.
Breitholtz, C., Molander, M., and Navarro-Adlemo, see Venkateswarlu, T.
R. Space and time continuous lumped transmis-
A sion line model p661
Brennan, P.V. Technique allowing rapid frequency F
sweeping in aided-acquisition phase-locked loops
Abd-El-Barr, H.M. Systematic realisation of binary p205
AAbbddcaBeenoRlldu.-- p lMMeoomdttu aallltbeeiubvbia,l,dl iuIneI.gd.M M..b,, l loaocnagkdinsc d LifnRpu,y6n u9cHt4m.i ,-oK n.s B .sRe.ue siLsniegne , HcR.hy-auKrm.g ,e BBrriuatFnnth.ihne ,, ,T vJhA.or.B,l, .eu ,Bs CmehhBenoiea-lrncidbh,na i vsre,Cv,r .o LslA.iMt.,o.Na n,.ga , en GdMvh aOainSnbSdm a i uRtsdhhtu,reoab e,ntn Fshe.irG nse.s,te,so e hr ao AB.lniDddr. pb,1a Bs3saGl3,loo eppsAeti. rnNa.-o, f FFaab-nntrLieeeoout,nnrw sgoo n,Arf.s kr oLAmuno oafp,tl 6r y7Hasa1oni pnssfdl ii neoJeflua dnra ,n abcYlloonoactgnkiugsne u oBcuoipsru4-cn8vud3iat r ioainbm lpeli nepmunetensut raat-lo
AAbbudpHeeeullram-fnaMog’ora,tmt ataClin.e,cN be., M .oTfI. b raanHhaailrmom gouMne.i ,c CaMnadnO dS H iunactniergrc,um iotdsCu .lNao.tw iiosnenge BBBuuylrrdleni,teg ,i, tD a.FlR.D .,. ,fJai .ln,tad enr sdT B oewrHepoor4urs0ar,1lo , c kMAs..,S .s,eD e .HaB.ne dro PuraBilom,ai rtAdi.v, e Ko.p erTawtoo-r FFFaaarnhligamsr,yo n,vS, a. JlM.uJ,.e. BM L..e,s,e t, aa bnaCidnl. diQt .Ky,oH lularsanos,bde ui snSS.,tiR nr.ieA, s .sRKO e..l basstoeeeiue o nnLdHsesueh s,is petC oi. noQ,fs. p seAic.ntOgr.ua l-
Abu(tpeorul etmsmeaiors’b taiaitlivtideitel,ydy )-ralenodMaau.ldcyTest.dii so nu Mnpoif4dpo6e6r3l5m l ingR C olfi nesc apfaocri ticvoeml-y —dPi me nsional offd-esvtaitcee s mwoidtehl lifnlgoa tionfg hgiugahr-dv olrtiangges Ferdriniasgadhiinmtudeasenl s t, ffi oltrCe .rmsFd .oi,sd cepras5en t de Ssiaynns ttoesm,as _H w.idAti.ho deFa ipeplldi wciiattmhip oonv erat-no
Abuelma’atti, M.T. Nonlinear distortion of an FM Cc Al,Ga, _,As/GaAs heterojunction: a simulation
signal by a passive network analysis 1
Abuaiemnl pmlaiB’fiaiFtertEsiT ,, Mp.5BT6i. MOPrSe dictainodn oCf MROFIS demoopdeuraltaitoinoanl CCaanbaelzia,s , C.J,. CM.aE.g,i starnadl i,D inFi.z,, PPa.cSc.aRg.n eslele a,D inAi.z,, SPa.nSg.aRl.l i, Fratnhcea ,d eJs.iEg.,n anodf mDuilatsi,a mVp.lFi.f ieSry stesmwaitticch edm-ectahpoacdi toforr
Aggarwal, S., and Bhattacharyya, A.B. Low- M., Tedesco, C., and Zanoni, E. Trap-related FIR decimator circuits p307
frequency gain-enhanced CMOS operational effects in AlGaAs/GaAs HEMTs p104 Fusco, V.F. Symbolic transfer functions for
amplifier p170 Cecchetti, M., Pavan, P., Spiazzi, G., Zanoni, E., a small-signal parameter extraction
Anastassiou, D., and Papananos, Y. see Papananos, and Muschitiello, M. see Pavan, P. Pp
Y Chan, P.K., and Wilson, G. see Wilson, G.
Antoniou, A. Improved minimax optimisation algo- Chang, W.-T., and Lin, M.-S. Half-band filter
rithms and their application in the design of design with odd-polynomial Chebyshev approx- G
recursive digital filters p724 imation p492
Antoniou, A., Sunder, S., Lu, W.-S., and Su, Y. see Cheetham, B.M.G., Mellor, P.H., and Leigh, S.P.
Sunder, S. see Mellor, P.H. Gerhard, R., Krautschneider, W.H., and Kohl, M.
Antoniou, A., Venkateswarlu, T., and Eswaran, C. Chen, B.-S., Chiou, B.-W., and Peng, S.-C. see Krautschneider, W.H.
see Venkateswarlu, T. Minimum sensitivity IIR filter design using prin- Ghibaudo, G., Brini, J., Benachir, M., and Balestra,
Argiiello, F., Doallo, R., and Zapata, E.L. Semi- cipal component approach p474 F. see Brini, J.
systolic architecture for fast Hartley transform: Chen, C.-H., Hwang, C., Guo, T.-Y., and Shieh, Gopinath, A., Birbas, A.N., Brunn, B., van Rheenen,
decimation in frequency and radix 2 p651 L.-S. see Hwang, C. A.D., Chen, C.L., and Smith, F. see Birbas, A.N.
Arsov, G. Triac model for computer aided analysis Chen, C.L., Birbas, A.N., Brunn, B., van Rheenen, Greer, N.P.J., and Denyer, P.B. New folded cascode
and design p430 A.D., Gopinath, A., and Smith, F. see Birbas, transconductor for bandpass ladder filters p551
Atadan, S. Minimum dimensional state-space for- AN. Guggenbiihl, W., and Eichenberger, C. see Eichen-
mulation of linear systems p590 Chen, X.X., and Wu, X.W. see Wu, X.W. berger, C.
Cheng, M.-H., and Huang, T.-C. Switched-capacitor Guo, T.-Y., Hwang, C., Shieh, L.-S., and Chen,
pipelined logarithmic A/D and D/A convertors C.-H. see Hwang, C.
p714
B Chiang, M.L., Lu, T.C., and Ku, J.B. Analogue
adaptive neural network circuit p717
H
Balestra, F., Brini, J.. Benachir, M., and Ghibaudo, ChiBo.u-S,. B.-W., Chen, B.-S., and Peng, S.-C. see Chen,
G. see Brini, J.
BBaalrRo-ocLdher,vi ,g ueA.zA,.- KTa.en,ld l ezS,ta rnudJm . , AR.o dsreie guSetzr-uTme,l lAe.z , J. see CChhooYwwS,.,S. MM..HH..LL..,, LLeeee,, YY..SS..,, aanndd WWoonngg,, J.JS..SL..L . seUes eL eeo,f HHaaimPgishly,tc ohnaDl,.i Gn.oD,s. ,K P.s Cy cPhearlfionrosm,a ncCe., aonf d trHaanrsiftearn tirse,s istI.a nsceee
Barber, W., Saul, P.H., Taylor, D.G., and Ward, T. SPICE in analogue computation and simulation amplifiers with capacitive sources in optical
Barsleeo wS,a ulK,. J.P .HF.a brication of PMOS transistors by otfra nssyfsetre mfsu ncctoinosniss tinpg2 8o2f circuit components and Hamaiplpltiocna,t ioDn.sK . pU4s5e of inductive compensation for
dopant implantation into TiSi, p587 Coco, S., Biey, M., and Premoli, A. see Biey, M. improving bandwidth and noise performance of
Barr, D.A., and Laverty, S.J. Impulse response sig- Conti, M., and Turchetti, C. see Turchetti, C. = frequency optical receiver preamplifiers
ndaettuerrem inoefd ab Dy CcEroLs scoZrnrSe:l aMtino,nC u pp16o0w der display Corrseiv,i siFt.e,d andp 25M3o randi, C. Inductive fault analysis HarPipt antis, I., Psychalinos, C., and Haigh, D.G. see
Batarseh, I.E., and Lee, C.Q. High-frequency link Crofts, M., and Jervis, B.W. see Jervis, B.W. Psychalinos, C.
cpaormamlluetla tiroenso nnanett worcko nvepr3to4r with fourth-order D Haslaono,p s Pi.n tPhee rfforerqmuaennccey saenaarlcyhs ism odofe pohfa soep-elroactkieodn
Bedrosian, D.G., and Vlach, J. Correspondence: p4i8
Comments on ‘Algorithm for reducing circuit Dana, S.K., and Patranabis, D. Single shunt fault Henderson, R.K., Ping, Li, and Sewell, J.1. Canon-
equations in computer applications’ p733 diagnosis in ladder structures with a new series of ical design of integrated ladder filters p222
Ben-Tzvi, D., and Sandler, M. Analogue implemen- numbers p38 Henderson, R.K., Ping, Li, and Sewell, J.1. Extended
tation of the Hough transform p457 DeMassa, T.A., and Sanchez, J.J. see Sanchez, J.J. Remez algorithms for filter amplitude and group
Benachir, M., Brini, J., Ghibaudo, G., and Balestra, Deen, M.J., and Yan, Z.X. see Yan, Z.X. delay approximation p289
F. see Brini, J. Denyer, P.B., and Greer, N.P.J. see Greer, N.P_J. Hetherington, G., Hoyle, R., and Priest, A. see
Benaissa, M., Dlay, S.S., and Holt, A.G.J. CMOS Dias, V.F., and Franca, J.E. see Franca, J.E. Hoyle, R.
VLSI design of a high-speed Fermat number Diniz, P.S.R., and Cabezas, J.C.E. Design of FIR Hicks, P.J., Marriott, A.P., and Tsalides, Ph. see
transform based convolver/correlator using three- equalisers by sharpening identical subfilters Marriott, A.P.
input adders p182 p4i133 Holt, A.G.J., Benaissa, M., and Dlay, S.S. see
Benidir, M. Simple sufficient test for stability of Diay, S.S., Benaissa, M., and Holt, A.G.J. see Benaissa, M.
two-dimensional recursive digital filters p731 Benaissa, M. Horrocks, D.H., and Bull, D.R. see Bull, D.R.
Beroual, A., and Buret, F. Optical detector of elec- Doallo, R., Argiiello, F., and Zapata, E.L. see Hoyle, R., Priest, A.. and Hetherington, G. Alterna-
trical discharges p620 Argiiello, F tive control strategies for rule-based transistor
Bhattacharyya, A.B., and Aggarwal, S. see Aggar- Domanski, M. Low-sensitivity structure for 1-D placement in CMOS VLSI design 137
wal, S. and 2-D digital FIR filters p229 Huang, C.N., and Abdel-Motaleb, Ibrahim M.
Biey, M., Coco, S., and Premoli, A. Maximally-flat Dutta Roy, S.C., Reddy, M.R.R., and Kumar, B. see Gummel-Poon model for single and double het-
rational approximation with multiple critical Reddy, M.R.R. erojunction bipolar transistors p165
pole-pair p244 Dwivedi, R., Sharma, A.K., and Srivastava, S.K. see Huang, T.-C., and Cheng, M.-H. see Cheng, M.-H.
Birbas, A.N., Brunn, B., van Rheenen, A.D., Gopin- Sharma, A.K. Hussein, A.O., and Fahmy, M.M. Design of 2-D
ath, A., Chen, C.L., and Smith, F. Low-frequency linear phase variable recursive digital filters for
enfofiescet s in pG1a75A s MESFETs related to backgating E Hwapanrga,ll el C.f,o rmG uoi,m plTe.m-eYn.,t atSihoine h, pL3.3-5S. , and Chen,
Board, K., Byrne, D.J., and Towers, M.S. see Byrne, C.-H. Evaluation of the impulse response energy
DJ. Eichenberger, C., and Guggenbihl, W. Charge of a 2-D linear discrete separable-denominator
Board, K., Nutt, H.C., and Smith, R. see Nutt, H.C. injection of analogue CMOS switches p155 system pl25
IEE PROCEEDINGS-G, Vol. 138, 1991 757
I Marriott, A.P., Tsalides, Ph., and Hicks, P.J. VLSI S
implementation of smart imaging system using
two-dimensional cellular automata p582
Ismcaoemebl,i natA.iAo.n alT esctiricnugi ts for p1s9t1u ck faults in CMOS Marftoirnwelalrid, G.n,e uraanld Pearnfeatltoig,u e-Rd.i gSiytnatlh esisc onovfe rtfeoerds- Sealeytti , J.RA..,, RRounbcieoll,a ,A .,R .a, nTde rrKeinnio,s hiPt.,a ,a nKd. Psieaet elRlui,b ioD,.
J McspKe5ee6 a7nL ayz,a ruPs.,S .,M .LJa zarus, M.J., and Rabah, K.V.O Sansicenehj eezcRt,oi nocnJe. lJ.l,a i,na nRd.t heD eMsaislsiaco,n /sTi.lAi.c onR-edviioexiwd e of scyarsrtieemr
McLernon, D.C. New method for the elimination of
Javdaens,i gnH . Noise measure for optimum broadband ttuwroe-sd impe5n4s1i onal limit cycles in first order struc- SanPdp.3l e7r7, M., and Ben-Tzvi, D. see Ben-Tzvi, D.
Jercviosm,p utBe.rW-.a,i deadn d tunCirnogf tsa,l gorMi.t hmsC oampppalriieds onto thoef MelRleodru,c tiP.oHn. , ofL esipgehc,t ralS. Pd.i, staonrtdi onC heine tchlaasms, DB a.mMp.lGi.- SanAg.a,l lTie,d eMs.c,o ,C aCn.a,l ia,n d C.Z,a nMoangiis,t rEa.l is,e e F.C,a nPaalcic,a gCn.e lla,
apm3p6l3i tude response of passive analogue filters sfiaemrsp libnyg apnr oceesnsh ancpe4d4 1 pulse width modulation SanCtFo.s , H.A., and Fernandes, C.F. see Fernandes,
JJounne,s ,Y aSn.g,, a nadn dS pFraay-,L onA.g ,s eeL uSop raseye, FAa -Long, Luo Molander, M., Breitholtz, C., and Navarro-Adlemo, SauSli,n gPl.eH .c,h iBpa r5b0e0r ,M HW.z, fTuanycltoiro,n Dg.eGn.e,r aatnodr Wa_rd, T.
R. see Breitholtz, Cc. Scholtz, A.L., Kreuzgruber, P., Bonek, E., and
K MMooroarned,i ,W .RC..,, aanndd CYoarssis,i neF,. sHe.e M.Co rsseie, YFa.s sine, H.M. SewOesltle,r rJe.1i.c,h eHre,n dJe.r sseoen ,K reRu.zK.g,r uabnedr , PPin.g , Li see Hen-
Muschitiello, M., Pavan, P., Spiazzi, G., Zanoni, E., derson, RK.
Kennedy, P., and Withington, S. see Withington, S. and Cecchetti, M. see Pavan, P. Shahzadi, B. Use of common factors in numerical
Kinoshita, K., Rubio, A., and Sainz, J.A. see Rubio, synthesis of RLC one ports p427
A Sharma, A.K., Dwivedi, R., and Srivastava, S.K.
Kohl, M., Krautschneider, W.H., and Gerhard, R. N Performance analysis of a solar array under
see Krautschneider, W.H. shadow condition p301
KKorlaluat,s cSh.nRe.i, daenrd, FWa.rHi.so,n , GeJr.Bh.a rsde,e FaR.r,i soann,d JK.Bo.h l, M. Natarajan, S. A systematic method for obtaining ShiCe.h-,H . Ls.e-Se. ,H wHawnagn,g ,C . C., Guo, T.-Y., and Chen,
KreCturuizrggrgreenurtbe edr f,bl yow aP.l,bp ehtaBw oepneaenrkt ,i cnlee iE.gs,th rbioSkcuehsro ilntgzp ,6 8t9rA e.nLc.h caenllds Natfsatoarrt aej arenaq,tu iaotSni.a,ol n asn dtu rsaiRnnasgj faonMr,Nm aAPt .iKo.n Effoinc ientp olaylngoomriiatlhsm SSSiimruii,t, hWK,.. -,C F.L.,e, e ,aB niCdr. bQa.Ls,u, n a,n Ad.D N..PF,.a -nKgB.,r usSne.nJe,. LsueBen. ,, LeDve.a,Pn . C-.RKQ.h. e enen,
fOsotremrerresi chepr3,2 5J . Modelling of three-- port RF trans- PP 05:3:0on b En OO R., Breitholtz, C., and Molander, 5% Gopinath, A., and Chen, C. L. see Birbas,
— Chiang, M.L., and Lu, T.C. see Chiang, NovMa.k ,s ee L.BAr.e ithWohletzn, Cd. o singular inputs of an LTI PSooeksa tRr,a, NuS.t,t ,a ndH .CL.e,e ,a nCd. Q.> see LeKe., seeC. QN. utt, H.C.
KKuumnmRoaetddrmed,ayl n, ,B t.o,M .HRoR.be. tdRadN.iyo n,v eelMx .tRem.noRdd.ei,df iacanacdtc iuorDnau ctyto an RpSo6Py7,I3 C SE. C. BJseTe Novsanabyolskmet,ise a?m l L .sAnp.ao,tlt i5 s1af nycdia nugsR ea tnhiedc i,es qcuZoa.nltMii.tn yu iMtiicne'ispm (aAli)n- =o0rs tdaetrep 12pvo9al ryi-- SSppiraiaanmzyzdp,i l ,eC Aem.Gce,.c n,hat eniPtdnat giv J,ao nrnM,ee.g s uP,l.s a,eS re. Zl yaPP naAovanCaiindE,, : iErP.Ar.,e gMurulesagrculhlyia tr isetalrrluroca,ty u rMfe.od,r
Nutt, H.C., Board, K., and Smith, R. Characteristics algorithms
L of 5-doped FETs in GaAs p633 Srivastava, A. Switching properties of polysilicon
emitter transistor operating in saturation p358
Srivastava, S.K., Sharma, A.K., and Dwivedi, R. see
Laverty, S.J., and Barr, D.A. see Barr, D.A. Oo Sharma, A.K.
Lazarus, M.J., Rabah, K.V.O, and McKeany, P.S. Strum, A., and Bar-Lev, A. Design of a multimesa
Stabilised power MOS-bipolar modules p564 Impatt diode array optimised for maximum heat
, CQ. Siri, K., and Fang, SJ. State plane Osterreicher, J., Kreuzgruber, P., Bonek, E., and dissipation p198
approach to frequency response of resonant con- Scholtz, A.L. see Kreuzgruber, P. Su, Y., Sunder, S., Lu, W.-S., and Antoniou, A. see
vertors p557 Sunder, S.
Lee, C.Q., and Batarseh, I.E. see Batarseh, I.E. Suckley, D. Genetic algorithm in the design of FIR
Leec,o ntCr.oQl. , naonnd reSsooonkasnatt ra,c ouSp.l eCdu rrepnarta llpelr ogrreasmonmaendt P Sunf,il teCr.s- Y.,p 23L4i u, W.-C., and Lour, W.-S. see Liu,
convertor p372 W.-C.
Lee, S.B., and Tchah, K.H. Design centring for yield Paccagnella, A., Canali, C., Magistrali, F., Sangalli, Sunder, S., Lu, W.-S., Antoniou, A., and Su, Y.
and noise figure improvement of GaAs M., Tedesco, Cc. and Zanoni, E. see Canali, Cc Design of digital differentiators satisfying pre-
MESFETs p467 Papananos, = and Anastassiou, D. Analysis and scribed specifications using optimisation tech-
Lee, Y.S., Chow, M.H.L., and Wong, J.S.L. see VLSI architecture of a nonlinear edge-preserving niques p315
Chow, M.H.L. noise-smoothing image filter p433 Suykens, J., and Vandewalle, J. Quasilinear
Lee, Y.S., Chow, M.H.L., and Wong, J.S.L. SPICE Patranabis, D., and Dana, S.K. see Dana, S.K. approach to nonlinear systems and the design of
simulation of nonlinear equations and circuits Pavan, P., Spiazzi, G., Zanoni, E., Muschitiello, M., n-double scroll (n = 1, 2, 3, 4,...) p595
Pp and Cecchetti, M. Latch-up DC triggering and
Leigh, S.P., Mellor, P.H., and Cheetham, B.M.G. holding characteristics of n-well, twin-tub and T
see Mellor, P.H. epitaxial CMOS technologies p604
Li, L.-M., Yu, D.-Y., and Wu, S.-Q. see Yu, D.-Y. Peng, S.-C., Chen, B.-S., and Chiou, B.-W. see Chen,
Lin, H.-K., and Abdel-Motaleb, I.M. Small signal B.-S. Taylor, D.G., Saul, P.H., Barber, W., and Ward, T.
non-quasi-static models for GaAs field effect tran- Perfetti, R., and Martinelli, G. see Martinelli, G. see Saul, P.H.
sistors for implementation in SPICE. Part II: Piatelli, D., Roncella, R., Saletti, R., and Terreni, P. Tchah, K.H., and Lee, S.B. see Lee, S.B.
Metal semiconductor field effect transistors see Roncella, R. Tedesco, C., Canali, C., Magistrali, F., Paccagnella,
(MESFETs) p749 Ping, Li, Henderson, R.K., and Sewell, J.I. see Hen- A., Sangalli, M., and Zanoni, E. see Canali, C.
Lin, H.-K., and Abdel-Motaleb, I.M. Small-signal derson, R.K. Terreni, P., Roncella, R., Saletti, R., and Piatelli, D.
nonquasi-static models for GaAs field effect tran- Premoli, A., Biey, M., and Coco, S. see Biey, M. see Roncella, R.
sistors for implementation in SPICE. Part I: Priest, A., Hoyle, R., and Hetherington, G. see — M.S., Byrne, D.J., and Board, K. see Byrne,
Modulation doped field effect transistors p735 Hoyle, R.
Lin, M.-S., and Chang, W.-T. see Chang, W.-T. Psychalinos, C., Haritantis, I, and Haigh, D.G. Tsalides, Ph., Marriott, A.P., and Hicks, PJ. see
Liou, J.. Wong, W.W., and Winton, R.S. see Wong, Switched capacitor circuit synthesis using voltage Marriott, AP.
W.W. inversion principles p703 Tsao, H.-W., Liu, S.-I., and Wu, J. see Liu, S.-I.
Liou, J.J., and Yuan, J.S. Physics-based large-signal Turchetti, C., and Conti, M. General approach for
heterojunction bipolar transistor model for development of CAD-oriented analytical device
circuit simulation p97 R models p637
Lisik, Z., and Turowski, M. Two-dimensional simu- Turowski, M., and Lisik, Z. see Lisik, Z.
lation of thyristor transient states from conduc-
tion to forward blocking p575 Rabah, K.V.O, Lazarus, M.J., and McKeany, P.S. U
Liu, S.-L, Tsao, H.-W., and Wu, J. CCII-based see Lazarus, M.J.
continuous-time filters with reduced gain- Rabah, K.V.O. Temperature effects on high power
bandwidth sensitivity p210 low on-resistance MOS-bipolar transistor module Umeda, H. Method of optimum oscillator design
Liu, W.-C., Sun, C.-Y., and Lour, W.-S. Character- P. using power-dependent S-parameters p533
istics of GaAs graded-period delta-doped super- Radhakrishnan, D. Design of CMOS circuits p83
lattice p629 Rajan, P.K., and Natarajan, S. see Natarajan, S. Vv
Liu, W.-C., Sun, C.-Y., and Lour, W.-S. Observation Ranic, Z.M., and Novak, L.A. see Novak, L.A.
of multi-state negative differential conductivity in Rathore, T.S. Some more published literature on
periodic delta-doped superlattice p424 current conveyors p432 Vallee, R.E., and El-Masry, E.I. Novel CMOS oper-
Lo, H.-Y., and Yang, T.C. Balanced high-speed Reddy, M.R.R., Dutta Roy, S.C., and Kumar, B. ational amplifier design technique for high-
residue number VLSI multiplier with error detec- Design of efficient second and higher degree FIR frequency switched-capacitor applications p623
tion p421 digital differentiators for midband frequencies van Rheenen, A.D., Birbas, A.N., Brunn, B., Gopin-
= - -S., Liu, W.-C., and Sun, C.-Y. see Liu, p29 ath, A., Chen, C.L., and Smith, F. see Birbas, A.N.
Rodriguez-Tellez, J. New nonlinear large-signal DC Vandewalle, J., and Suykens, J. see Suykens, J.
—o Chiang, M.L., and Ku, J.B. see Chiang, bipolar junction transistor model p145 Venkateswarlu, T., Eswaran, C., and Antoniou, A.
Rodriguez-Tellez, J.. and Baloch, A.K. Evaluation Design of circularly symmetric two- and three-
Lu, W.-S., Sunder, S., Antoniou, A., and Su, Y. see of packaging strays in discrete semiconductor dimensional digital filters using the concept of the
Sunder, S. devices p501 GIC_ p523
Lun, D.P.-K., and Siu, W.-C. Extended diagonal Roncella, R., Saletti, R., Terreni, P., and Piatelli, D. Vlach, J.,“ ad Bedrosian, D.G. see Bedrosian, D.G.
structure for address generation of the prime Application of a systolic macrocell-based VLSI
factor algorithm p449 design style to the design of a single-chip high- WwW
performance FIR filter p17
M Rubio, A., Sainz, J.A., and Kinoshita, K. Test
pattern generation for logic crosstalk faults in Ward, T., Saul, P.H., Barber, W., and Taylor, D.G.
VLSI circuits p179 see Saul, P.H.
Magistrali, F., Canali, C., Paccagnella, A., Sangalli, Russell, 1.A.D., and Webb, P.W. see Webb, P.W. Watts, S. Radar clutter and multipath propagation
M., Tedesco, C., and Zanoni, E. see Canali, c. Ryum, B.R., and Abdel-Motaleb, ILM. Effect of 3
Manetti, S. New ‘approach to automatic symbolic — current on current gain of HBTs Webb, P.W. Thermal imaging of electronic devices
analysis of electric circuits p22 P with low surface emissivity p390
758 IEE PROCEEDINGS-G, Vol. 138, 1991
Webb, P.W., and Russell, 1.A.D. Thermal simula- Wong, W.W., Winton, R.S., and Liou, J. Statistical Yu, D.-Y., Wu, S.-Q. and Li, L.-M. Design of
tion of transients in microwave devices p329 and numerical method for MOSFET integrated- ial response data transmission filters with
Wilkinson, R.H. High-fidelity finite-impulse- circuit sensitivity simulation using SPICE p77 specified stopband attenuation p347
response filters with optimal stopbands p264 Wu, J., Liu, S.-L, and Tsao, H.-W. see Liu, S.-I. Yuan, J.S., and Liou, J.J. see Liou, J.J.
Wilson, G., and Chan, P.K. Comparison of four Wu, S.-Q., Yu, D.-Y., and Li, L.-M. see Yu, D.-Y.
CloMguOeS filtterra nasppcloincdautcitoonrss f6or8 3f ully integrated ana- Wu,ci rcXu.iWt.s, apn6d7 9C hen, X.X. Algebra system for ECL Z
Winton, R.S., Wong, W.W., and Liou, J. see Wong,
W.W. Y Zanoni, E., Canali, C., Magistrali, F., Paccagnella,
Withington, S., and Kennedy, P. Numerical pro- A., Sangalli, M., and Tedesco, C. see Canali, C.
cedure for simulating the large-signal quantum Yan, Z.X., and Deen, M.J. Physically-based method Zanoni, E., Pavan, P., Spiazzi, G., Muschitiello, M.,
behaviour of superconducting tunnel-junction cir- for measuring the threshold voltage of and Cecchetti, M. see Pavan, P.
cuits p70 MOSFETs p351 Zapata, E.L., Argiiello, F.. and Doallo, R. see
Wong, J.S.L., Chow, M.H.L., and Lee, Y.S. see Yang, T.C., and Lo, H.-Y. see Lo, H.-Y. Argiiello, F.
Chow, M.H.L. Yassine, H.M., and Moore, W.R. Improved mixed- Zhong-xuan Zhou, J. Second-order switched capa-
Wong, J.S.L., Lee, Y.S., and Chow, M.HL.L. see Lee, radix conversion for residue number system citor building block and its application to the
YS. architectures p120 design of silicon efficient filters p9
IEE PROCEEDINGS-G, Vol. 138, 1991
Subject index
ACTIVE NETWORKS Some more published literature on current conveyors. T.S. Rathore p432
Switched capacitor circuit synthesis using voltage inversion principles. C. Psy-
Canonical design of integrated ladder filters. R.K. Henderson, Li Ping and J.I. chalinos, Iw d stag and D.G. Haigh p703
Sewell Switched. lined logarithmic A/D and D/A convertors. M.-H.
Some more published literature on current conveyors. T.S. Rathore p432 Cheng and T. C. Huang p714
Symbolic transfer functions for MESFET small-signal parameter extraction.
AMPLIFIERS V.F. Fusco p217
Systematic method for the design of multiamplifier switched-capacitor FIR deci-
Low-frequency gain-enhanced CMOS operational amplifier. S. Aggarwal and mator circuits. J.E. Franca and V.F. Dias p307
A.B. Bhattacharyya p170
Novel CMOS operational amplifier design technique for high-frequency COMMUNICATION SYSTEMS THEORY
switched-capacitor applications. R.E. Vallee and E.I. El-Masry
Performance of transfer resistance amplifiers with capacitive sources in optical Performance analysis of phase-locked loops in the frequency search mode of
applications. D.K. Hamilton p45 operation. P. Hasan 8
Reduction of spectral distortion in class D amplifiers by an enhanced pulse
width moduiation sampling process. P.H. Mellor, S.P. Leigh and B.M.G. COMPONENTS
Cheetham p44l
Synthesis of feedforward neural analogue-digital convertors. G. Martinelli and Thermal imaging of electronic devices with low surface emissivity. P.:W. Webb
R. Perfetti 567 p390
Use of inductive compensation for improving bandwidth and noise performance
of high frequency optical receiver preamplifiers. D.K. Hamilton p52 COMPUTER APPLICATIONS
ANALOGUE COMPUTERS AND COMPUTATION Extended diagonal structure for address generation of the prime factor algo-
rithm. D.P.-K. Lun and W.-C. Siu
Use of SPICE in analogue computation and simulation of systems consisting of
circuit components and transfer functions. M.H.L. Chow, Y.S. Lee and J.S.L. COMPUTER SIMULATION
Wong p282
New approach to automatic symbolic analysis of electric circuits. S. Manetti
ANALOGUE FILTERS p22
Comapppalriicastoino ns.o f Gf.o urW ilsoCnM OSa ndt rPa.nsKc.oCnhdaunct orsp 68f3or fully integrated analogue filter COMPUTER-AIDED DESIGN
Alternative control strategies for rule-based transistor placement in CMOS
ANALOGUE-DIGITAL CONVERSION VLSI design. R. Hoyle, A. Priest and G. Hetherington 137
Triac model for computer aided analysis and design. G. Arsov p430
Analogue implementation of the Hough transform. D. Ben-Tzvi and M. Sandler
57
CONTROL SYSTEMS
Analysis of analogue circuit implementations from translinear blocks. A. Fabre
p4 83 Relationship of singular value stability robustness bounds to spectral radius for
Synthesis of feedforward neural analogue-digital convertors. G. Martinelli and discrete systems with application to digital filters. J.B. Farison and S.R. Kolla
R. Perfetti p567 ps
ARCING CONVERTORS
Optical detector of electrical discharges. A. Beroual and F. Buret p620 Current programmed control nonresonant coupled parallel resonant convertor.
C.Q. Lee and S. Sooksatra p372
ARRAY PROCESSING Design of circularly symmetric two- and three-dimensional digital filters using
the concept of the GIC. T. Venkateswarlu, C. Eswaran and A. Antoniou
PACE: A regular array for implementing regularly and irregularly structured
algorithms. A. Spray and S. Jones High-frequency link parallel resonant convertor with fourth-order commutation
network. I.E. Batarseh and C.Q. Lee p34
BIPOLAR TRANSISTORS State plane approach to frequency response of resonant convertors. C.Q. Lee,
K. Siri and S.J. Fang p557
Analysis of analogue circuit implementations from translinear blocks. A. Fabre Switched-capacitor pipelined logarithmic A/D and D/A convertors. M.-H.
Gumm8e3l -Poon model for single and double heterojunction bipolar transistors. Cheng and T.-C. Huang p714
C.N. Huang and Ibrahim M. Abdel-Motaleb p165 CROSSTALK
New nonlinear large-signal DC bipolar junction transistor model. J. Rodriguez-
Tellez p45 Test pattern generation for logic crosstalk faults in VLSI circuits. A. Rubio, J.A.
Novel modification on SPICE BJT model to obtain extended accuracy. H. Sainz and K. Kinoshita p179
Kuntman
Physics-based large-signal heterojunction bipolar transistor model for circuit DESIGN
simulation. J.J. Liou and J.S. Yuan p97
Stabilised power MOS-bipolar modules. M.J. Lazarus, K.V.O Rabah and PS. Algebra system for ECL circuits. X.W. Wu and X.X.Chen p679
McKeany p564 Design of FIR equalisers by sharpening identical subfilters. P.S.R. Diniz and
Thermal simulation of transients in microwave devices. P.W. Webb and I.A.D. J.C.E. Cabezas p413
Russell p329 Design of digital differentiators satisfying prescribed specifications using opti-
BREAKDOWN AND GAS DISCHARGES misation techniques. S. Sunder, W.-S. Lu, A. Antoniou and Y.Su p315
Half-band filter design with odd-polynomial Chebyshev approximation. W.-T.
Two-dimensional off-state modelling of high-voltage semiconductor devices Chang and M.-S. Lin p492
with floating guard rings. D.J. Byrne, M.S. Towers and K. Board p109 High-fidelity finite-impulse-response filters with optimal stopbands. R.H. Wilk-
inson 64
CHARGE-COUPLED DEVICES Minimum sensitivity IIR filter design using principal component approach. B.-S.
Chen, B.-W. Chiou and S.-C. Peng p474
Systematic realisation of binary and multivalued logic functions using charge
coupled building blocks. H.M. Abd-El-Barr p694 DIGITAL CIRCUITS
CIRCUIT THEORY AND DESIGN Design of CMOS circuits. D. Radhakrishnan p83
Single chip 500 MHz function generator. P.H. Saul, W. Barber, D.G. Taylor and
A systematic method for obtaining state equations using MNA. S. Natarajan T. Ward p239
Pp.3 41 Test pattern generation for logic crosstalk faults in VLSI circuits. A. Rubio, J.A.
Analogue adaptive neural network circuit. M.L. Chiang, T.C. Lu and J.B. Ku Sainz and K. Kinoshita p179
717 Testing for stuck faults in CMOS combinational circuits. A.A. Ismaeel p191
CCIlI-based continuous-time filters with reduced gain-bandwidth sensitivity.
S.-I. Liu, H.-W. Tsao and J. Wu _ p2i0 DIGITAL COMPUTERS AND COMPUTATION
— design of integrated ladder filters. R.K. Henderson, Li Ping and J.I.
wel CMOS VLSI design of a high-speed Fermat number transform based
= =" of analogue CMOS switches. C. Eichenberger and W. Guggen- convolver/correlator using three-input adders. M. Benaissa, S.S. Dlay and
ih] pl A.G.J. Holt p82
Correspondence: Comments on ‘Algorithm for reducing circuit equations in
computer applications’. D.G. Bedrosian and J. Viach p733 DIGITAL FILTERS
Current flow between neighbouring trench cells triggered by alpha particle
strikes. W.H. Krautschneider, R. Gerhard and M. Kohl p689 Design of 2-D linear phase variable recursive digital filters for parallel form
Current programmed control nonresonant coupled parallel resonant convertor. implementation. A.O. Hussein and M.M. Fahmy
C.Q. Lee and S. Sooksatra p372 Design of circularly symmetric two- and three-dimensional digital filters using
Design of CMOS circuits. D. Radhakrishnan p83 4 "aaa of the GIC. T. Venkateswarlu, C. Eswaran and A. Antoniou
High- vs Eg link parallel resonant convertor with fourth-order commutation P:
network. I.E. Batarseh and C.Q. Lee Design of efficient second and higher degree FIR digital differentiators for
Minimum dimensional state-space formulation of linear systems. S. Atadan midband frequencies. M.R.R. Reddy, S.C. Dutta Roy and B. Kumar p29
Pp Genetic algorithm in the design of FIR filters. D. Suckley p234
New approach to automatic symbolic analysis of electric circuits. S. Manetti Improved minimax optimisation algorithms and their application in the design
P. of recursive digital filters. A. Antoniou p724
New folded cascode transconductor for bandpass ladder filters. N.P.J. Greer Low-sensitivity structure for 1-D and 2- D digital FIR filters. M. Domanski
and P.B. Denyer p551 P.
Numerical procedure for simulating the large-signal quantum behaviour of New method for the elimination of two-dimensional limit cycles in first order
_— tunnel-junction circuits. §. Withington and P. Kennedy structures. D.C. McLernon p541
Pp Primitive operator digital filters. D.R. Bull and D.H. Horrocks p401
760 IEE PROCEEDINGS-G, Vol. 138, 1991
Relationship of singular value stability robustness bounds to spectral radius for LOGIC
discrete systems with application to digital filters. J.B. Farison and S.R. Kolla
SimPp 5l e sufficient test for stability of two-dimensional recursive digital filters. M. ASylsgteebmraat iscy streemal ifsoart iEonC L ofc ibrciuniatrs.y Xa.nWd. mWuul tiavnadl ueXd. X.lCoghiecn func6t7i9on s using charge
Benidir p731 coupled building blocks. H.M. Abd-El-Barr
DOPING MATHEMATICAL TECHNIQUES
Characteristics of GaAs graded-period delta-doped superlattice. W.-C. Liu, Algebra system for ECL circuits. X.W. Wu and X.X.Chen p679
C.-Y. Sun and W.-S. Lour p629 Alternative control strategies for rule-based transistor placement in CMOS
Characteristics of d6-doped FETs in GaAs. H.C. Nutt, K. Board and R. Smith VLSI design. R. Hoyle, A. Priest and G. Hetherington 137
p633 Correspondence: Comments on ‘Algorithm for reducing circuit equations in
Observation of multi-state negative differential conductivity in periodic delta- computer applications’. D.G. Bedrosian and J. Viach 733
doped superlattice. W.-C. Liu, C.-Y. Sun and W.-S. Lour p424 Efficient algorithm for rational transformation on polynomials. S. Natarajan
and P.K. Rajan p530
ELECTRON DEVICES Evaluation of the impulse response energy of a 2-D linear discrete separable-
oo system. C. Hwang, T.-Y. Guo, L.-S. Shieh and C.-H. Chen
Trap-related effects in AlGaAs/GaAs HEMTs. C. Canali, F. Magistrali, A. Pac- P
cagnella, M. Sangalli, C. Tedesco and E. Zanoni_ p104 Extended Remez algorithms for filter amplitude and group delay approx-
imation. R.K. Henderson, Li Ping and J.1. Sewell 289
FAULT DETECTION Extreitnhdme.d D.dPi.a-gKo.n alL uns trauncdt urWe. -Cf.o r Siaud dreps4s4 9 generation of the prime factor algo-
Testing for stuck faults in CMOS combinational circuits. A.A. Ismaeel p191 General approach for development of CAD-oriented analytical device models.
C. Turchetti and M. Conti p637
Genetic algorithm in the design of FIR filters. D. Suckley p234
FAULT LOCATION
Improved minimax optimisation algorithms and their application in the design
Inductive fault analysis revisited. F. Corsi and C. Morandi p253 of recursive digital filters. A. Antoniou p724
Single shunt fault diagnosis in ladder structures with a new series of numbers. Improved mixed-radix conversion for residue number system architectures.
S.K. Dana and D. Patranabis p38 H.M. Yassine and W.R. Moore p120
Inductive fault analysis revisited. F. Corsi and C. Morandi p253
Maximally-flat rational approximation with multiple critical pole-pair. M. Biey,
FIELD-EFFECT TRANSISTORS S. Coco and A. Premoli p244
Minimal-order polynomial satisfying the equality c™p(A) = 0. L.A. Novak and
Charac3t3e ristics of d-doped FETs in GaAs. H.C. Nutt, K. Board and R. Smith PAZC.EM:. ARa nirceg ulapr1 29ar ray for implementing regularly and irregularly structured
Small signal non-quasi-static models for GaAs field effect transistors for imple- algorithms. A. Spray and S. Jones p613
mentation in SPICE. Part II: Metal semiconductor field effect transistors Primitive operator = filters. D.R. Bull and D.H. Horrocks p401
(MESFETs). H.-K. Lin and I.M. Abdel-Motaleb p749 Two-dimensional off-state modelling of high-voltage semiconductor devices
Smamleln-tsaitginaoln nion nqSuPaIsCiE-.s taPtairct mIo: dMeoldsu lfaotr ioGna Asd opfeiedl d fieeflfde cte fftercat nstirsatnosriss tofrosr. iHm.p-lKe.- Whweint h dfol oastiinnggu lgaura rien pruitnsg s.o fD .Ja.n BLyTrIne ,s yMs.tSe.m Tonowte rsc auasned dKi.s cBonotairndu itieps1 09i n state
Lin and I.M. Abdel-Motaleb p735 variables?. L.A. Novak p151
FILTERS AND FILTERING METAL-OXIDE-SEMICONDUCTOR STRUCTURES
Application of a systolic macrocell-based VLSI design style to the design of a
single-chip high-performance FIR filter. R. Roncella, R. Saletti, P. Terreni and Alternative control strategies for rule-based transistor placement in CMOS
VLSI design. R. Hoyle, A. Priest and G. Hetherington
D. Piatelli p17 Statistical and numerical method for MOSFET integrated-circuit sensitivity
CCII-based continuous-time filters with reduced gain-bandwidth sensitivity. simulation using SPICE. W.W. Wong, R.S. Winton and J. Liou p77
S.-I. Liu, H.-W. Tsao and J. Wu p210 Threshold voltage and subthreshold slope of the volume-inversion MOS tran-
Comrpeasproinssoen of opfa scsiovmep uatnearl-oagiudee d filtteursn.i nBg. W.a lgJeorrviitsh masn d aMpp.l iCerdo fttso tph3e 63a mplitude sistor. J. Brini, M. Benachir, G. Ghibaudo and F. Balestra pi33
Design of FIR equalisers by sharpening identical subfilters. P.S.R. Diniz and
J.C.E. Cabezas p413 MICROWAVE CIRCUITS AND NETWORKS
Design of partial response data transmission filters with specified stopband Method of optimum oscillator design using power-dependent S-parameters. H.
attenuation. D.-Y. Yu, S.-Q. Wu and L.-M. Li p347
Extended Remez algorithms for filter amplitude and group delay approx- Umeda p533
imation. R.K. Henderson, Li Ping and J.I. Sewell p289
Half-band filter design with odd-polynomial Chebyshev approximation. W.-T. MICROWAVE HEATING
Chang and M.-S. Lin p492
High-fidelity finite-impulse-response filters with optimal stopbands. R.H. Wilk- Thermal simulation of transients in microwave devices. P.W. Webb and I1.A.D.
inson Russell p329
Minimum sensitivity IIR filter design using principal component approach. B.-S.
Chen, B.-W. Chiou and S.-C. Peng 74 MODULATION
New folded cascode transconductor for bandpass ladder filters. N.P.J. Greer
and P.B. Denyer p551 Harmonic and intermodulation performance of analogue CMOS circuits owing
Nonlinear distortion of an FM signal by a passive network. M.T. Abuelma’atti to mobility reduction. M.T. Abuelma’atti p65
1 Prediction of RFI demodulation in BiFET, BIMOS and CMOS operational
amplifiers. M.T. Abuelma’atti p56
GRAPH THEORY AND TOPOLOGY NETWORKS
Use of common factors in numerical synthesis of RLC one ports. B. Shahzadi
p427 A systematic method for obtaining state equations using MNA. S. Natarajan
p341
Bound on inputs to neurons of Hopfield continuous-variable neural network.
GUNN DEVICES Luo Fa-Long and Yang Jun
Minimum dimensional state-space formulation of linear systems. S. Atadan
Field impoverishment modes in a diode with an Al,Ga,_,As/GaAs hetero- p590 :
junction: a simulation analysis. C.F. Fernandes and HLA. Santos p9l Nonlinear distortion of an FM signal by a passive network. M.T. Abuelma’atti
1
HYSTERESIS Single shunt fault diagnosis in ladder structures with a new series of numbers.
S.K. Dana and D. Patranabis p38
Characteristics of GaAs graded-period delta-doped superlattice. W.-C. Liu,
C.-Y. Sun and W.-S. Lour p629
NOISE AND INTERFERENCE
IMAGE PROCESSING Design centring for yield and noise figure improvement of GaAs MESFETs.
S.B. Lee and K.H. Tchah 7
Analysis and VLSI architecture of a nonlinear edge-preserving noise-smoothing Design of partial response data transmission filters with specified stopband
image filter. Y. Papananos and D. Anastassiou p433 attenuation. D.-Y. Yu, S.-Q. Wu and L.-M. Li p347
VLSI implementation of smart imaging system using two-dimensional cellular Low-frequency noise in GaAs MESFETs related to backgating effects. A.N.
automata. A.P. Marriott, Ph. Tsalides and P.J. Hicks p582 Birbas, B. Brunn, A.D. van Rheenen, A. Gopinath, C.L. Chen and F. Smith
175
INSTRUMENTATION AND MEASURING SCIENCE wei measure for optimum broadband design. H. Javan pl
Performance of transfer resistance amplifiers with capacitive sources in optical
Design of digital differentiators satisfying prescribed specifications using opti- applications. D.K. Hamilton p45
misation techniques. S. Sunder, W.-S. Lu, A. Antoniou and Y. Su Radar clutter and multipath propagation. S. Watts p73
Evaluation of packaging strays in discrete semiconductor devices. J. Rodriguez- Use of inductive compensation for improving bandwidth and noise performance
Tellez and A.K. Baloch p50 of high frequency optical receiver preamplifiers. D.K. Hamilton p52
Physically-based method for measuring the threshold voltage of MOSFETs.
Z.X. Yan and M.J. Deen p351 NONLINEAR SYSTEMS
Thermal imaging of electronic devices with low surface emissivity. P.W. Webb
p390 New nonlinear large-signal DC bipolar junction transistor model. J. Rodriguez-
Tellez pl45 3
INTEGRATED CIRCUITS Quasilinear approach to nonlinear systems and the design of n-double scroll
(n = 1, 2, 3, 4,...). J. Suykens and J. Vandewalle p595
Inductive fault analysis revisited. F. Corsi and C. Morandi p253 SPICE simulation of nonlinear equations and circuits. Y.S. Lee, M.H.L. Chow
Low-frequency gain-enhanced CMOS operational amplifier. S. Aggarwal and and J.S.L.Wong p273
A.B. Bhattacharyya p170
Single chip 500 MHz function generator. P.H. Saul, W. Barber, D.G. Taylor and NUMERICAL ANALYSIS
T. Ward p239
Statistical and numerical method for MOSFET integrated-circuit sensitivity Use of common factors in numerical synthesis of RLC one ports. B. Shahzadi
simulation using SPICE. W.W. Wong, R.S. Winton and J. Liou p77 p427
IEE PROCEEDINGS-G, Vol. 138, 1991 761
OPTIMISATION Small signal non-quasi-static models for GaAs field effect transistors for imple-
mentation in SPICE. Part II: Metal semiconductor field effect transistors
Design centring for yield and noise figure improvement of GaAs MESFETs. (MESFETs). H.-K. Lin and I.M. Abdel-Motaleb p749
S.B. Lee and K.H. Tchah 7 Small-signal nonquasi-static models for GaAs field effect transistors for imple-
Design of digital differentiators satisfying prescribed specifications using opti- mentation in SPICE. Part I: Modulation doped field effect transistors. H.-K.
misation techniques. S. Sunder, W.-S. Lu, A. Antoniou and Y. Su p315 Lin and I.M. Abdel-Motaleb 735
Statistical and numerical method for MOSFET integrated-circuit sensitivity
POLES AND ZEROS simulation using SPICE. W.W. Wong, R.S. Winton and J. Liou
Threshold voltage and subthreshold slope of the volume-inversion MOS tran-
Maximally-flat rational approximation with multiple critical pole-pair. M. Biey, sistor. J. Brini, M. Benachir, G. Ghibaudo and F. Balestra p133
S. Coco and A. Premoli p244 Triac model for computer aided analysis and design.G. Arsov p430
Two-dimensional simulation of thyristor transient states from conduction to
POWER ELECTRONICS forward blocking. Z. Lisik and M. Turowski p575
Use of SPICE in analogue computation and simulation of systems consisting of
Temperature effects on high power low on-resistance MOS-bipolar transistor circuit components and transfer functions. M.H.L. Chow, Y.S. Lee and J.S.L.
module. K.V.O. Rabah p510 Wong p282
RADAR AND RADIONAVIGATION SOLAR CELLS
Radar clutter and multipath propagation. S. Watts p73 Performance analysis of a solar array under shadow condition. A.K. Sharma, R.
Dwivedi and S.K. Srivastava p301
RECEIVERS
Performance analysis of phase-locked loops in the frequency search mode of STABILITY
operation. P. Hasan p418 Relationship of singular value stability robustness bounds to spectral radius for
Technique allowing rapid frequency sweeping in aided-acquisition phase-locked discrete systems with application to digital filters. J.B. Farison and S.R. Kolla
loops. P.V. Brennan p205 ps
Simple sufficient test for stability of two-dimensional recursive digital filters. M.
SATELLITE LINKS AND SPACE COMMUNICATION Benidir p731
Stabilised power MOS-bipolar modules. M.J. Lazarus, K.V.O Rabah and PS.
Technique allowing rapid frequency sweeping in aided-acquisition phase-locked McKeany p564
loops. P.V. Brennan p205
SUPERCONDUCTIVITY
SEMICONDUCTOR DEVICES AND MATERIALS
Characteristics of 6-doped FETs in GaAs. H.C. Nutt, K. Board and R. Smith Numerical procedure for simulating the large-signal quantum behaviour of
p633 superconducting tunnel-junction circuits. $. Withington and P. Kennedy
Design centring for yield and noise figure improvement of GaAs MESFETs. p70
S.B. Lee and K.H. Tchah ‘p467
Design of a multimesa Impatt diode array optimised for maximum iieat dissi- SWITCHED CAPACITOR FILTERS
pation. A. Strum and A. Bar-Lev p198
Effect of recombination current on current gain of HBTs. B.R. Ryum and I.M. Second-order switched capacitor building block and its application to the
Abdel-Motaleb pi15 design of silicon efficient filters. J. Zhong-xuan Zhou
Evaluation of packaging strays in discrete semiconductor devices. J. Rodriguez- Switched capacitor circuit synthesis using voltage inversion principles. C. Psy-
chalinos, I. Haritantis and D.G. Haigh p703
FabTreillceazt ioann d oAf. K.P MBOalSo ch tranp5sSi0s1t ors by dopant implantation into TiSi,. K.J. Systematic method for the design of multiamplifier switched-capacitor FIR deci-
Barlow p587 mator circuits. J.E. Franca and V.F. Dias p307
Field impoverishment modes in a diode with an Al,Ga,_,As/GaAs hetero-
junction: a simulation analysis. C.F. Fernandes and H.A. Santos p91 SWITCHES AND SWITCHING THEORY
Harmonic and intermodulation performance of analogue CMOS circuits owing
to mobility reduction. M.T. Abuelma’atti p65 State plane approach to frequency response of resonant convertors. C.Q. Lee,
Impulse response signature of a DCEL ZnS: Mn,Cu powder display determined K. Siri and S.J. Fang p557
by crosscorrelation. D.A. Barr and S.J. Laverty p160
Latch-up DC triggering and holding characteristics of n-well, twin-tub and THYRISTORS
epitaxial CMOS technologies. P. Pavan, G. Spiazzi, E. Zanoni, M. Muschi- Two-dimensional simulation of thyristor transient states from conduction to
tiello and M. Cecchetti forward blocking. Z. Lisik and M. Turowski p575
Method of optimum oscillator design using power-dependent S-parameters. H.
Umeda p533
Observation of multi-state oro differential conductivity in periodic delta- TRANSFORMERS
doped superlattice. W.-C. Liu, C.-Y. Sun and W.-S. Lour p424
Physically-based method for measuring the threshold voltage of MOSFETs. Modelling of three-port RF transformers. P. Kreuzgruber, E. Bonek, A.L.
Z.X. Yan and M.J. Deen p351 Scholtz and J. Osterreicher p325
Prediction of RFI demodulation in BiFET, BIMOS and CMOS operational
amplifiers. M.T. Abuelma’atti p56 TRANSISTORS
Review of carrier injection in the silicon/silicon-dioxide system. J.J. Sanchez and
T.A. DeMassa p377 Analogue adaptive neural network circuit. M.L. Chiang, T.C. Lu and J.B. Ku
Triac model for computer aided analysis and design. G. Arsov 430 p 717
Two-dimensional off-state modelling of high-voltage semiconductor devices Effect of recombination current on current gain of HBTs. B.R. Ryum and I.M.
with floating guard rings. D.J. Byrne, M.S. Towers and K. Board p109 Abdel-Motaleb_ p115
Two-dimensional simulation of thyristor transient states from conduction to Fabrication of PMOS transistors by dopant implantation into TiSi,. K.J.
forward blocking. Z. Lisik and M. Turowski p575 Barlow p587
Harmonic and intermodulation performance of analogue CMOS circuits owing
SIGNAL PROCESSING Swittoc mhoibnigl iptryo preerdtuicetsi oonf. pMo.lyTs.i lAicboune lmeam’iatttetri transistor operating in saturation. A.
Design of efficient second and higher degree FIR digital differentiators for Srivastava p358
midband frequencies. M.R.R. Reddy, S.C. Dutta Roy and B. Kumar p29 Temperature effects on high power low on-resistance MOS-bipolar transistor
Primitive operator digital filters. D.R. Bull and D.H. Horrocks p401 module. K.V.O. Rabah p510
SIMULATION TRANSMISSION LINES
Canonical design of integrated ladder filters. R.K. Henderson, Li Ping and J.I. Space and time continuous lumped transmission line model. C. Breitholtz, M.
Sewell p222 Molander and R. Navarro-Adlemo
Comparison of four CMOS transconductors for fully integrated analogue filter
applications. G. Wilson and P.K.Chan p683 VERY LARGE SCALE INTEGRATION
Effect of recombination current on current gain of HBTs. B.R. Ryum and I.M.
Abdel-Motaleb pl15 Application of a systolic macrocell-based VLSI design style to the design of a
General approach for development of CAD-oriented analytical device models. single-chip high-performance FIR filter. R. Roncella, R. Saletti, P. Terreni and
C. Turchetti and M. Conti p637 D. Piatelli pi7
—" dimensional state-space formulation of linear systems. S. Atadan Balanced high-speed residue number VLSI multiplier with error detection. H.-Y.
P. Lo and T.C. Yang 1
Modelling of capacitively (resistively)-loaded uniform RC lines for computer CMOS VLSI design of a high-speed Fermat number transform based
aided analysis. M.T. Abuelma’a‘ti convolver/correlator using three-input adders. M. Benaissa, S.S. Dlay and
Modelling of three-port RF transformers. P. Kreuzgruber, E. Bonek, A.L. AG.J. Holt p182
Scholtz andJ .O sterreicher p325 Fabrication of PMOS transistors by dopant implantation into TiSi,. K.J.
Novel modification on SPICE BJT mocel to obtain extended accuracy. H. Barlow p587
Kuntman p673 Semisystolic architecture for fast Hartley transform: decimation in frequency
Numerical procedure for simulating the large-signal quantum behaviour of and radix 2. F. Argiiello, R. Doallo and E.L. Zapata
superconducting tunnel-junction circuits. S. Withington and P. Kennedy Test pattern generation for logic crosstalk faults in VLSI circuits. A. Rubio, J.A.
p70 Sainz and K. Kinoshita p179
SPICE simulation of nonlinear equations and circuits. Y.S. Lee, M.H.L. Chow VLSI implementation of smart imaging system using two-dimensional cellular
and J.S.L.Wong p273 automata. A.P. Marriott, Ph. Tsalides and P.J. Hicks p582
IEE PROCEEDINGS-G, Vol. 138, 1991
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