High-k gate dielectrics

611 Pages·2004·8.438 MB·English

by  Michel Houssa

Series in Materials Science and Engineering
k
High- Gate Dielectrics
Edited by
Michel Houssa
Laboratoire Materiaux et Microelectronique de Provence,
Universite de Provence, France
Silicon Processing and Device Technology Division,
IMEC, Belgium
Institute of Physics Publishing
Bristol and Philadelphia
qIOP Publishing Ltd 2004
Allrightsreserved.Nopartofthispublicationmaybereproduced,storedin
a retrieval system or transmitted in any form or by any means, electronic,
mechanical, photocopying, recording or otherwise, without the prior
permission of the publisher. Multiple copying is permitted in accordance
withthetermsoflicencesissedbytheCopyrightLicensingAgencyunderthe
terms of its agreementwith Universities UK (UUK).
British LibraryCataloguing-in-Publication Data
Acatalogue record forthis book isavailable from the British Library.
ISBN 0 7503 0906 7
LibraryofCongress Cataloging-in-Publication Data are available
Series Editors: B Cantor and M JGoringe
Commissioning Editor: Tom Spicer
Production Editor: Simon Laurenson
Production Control: Sarah Plentyand LeahFielding
Cover Design: Victoria Le Billon
Marketing: Nicola Newey and Verity Cooke
PublishedbyInstituteofPhysicsPublishing,whollyownedbytheInstituteof
Physics,London
Institute ofPhysics Publishing, Dirac House, TempleBack,
BristolBS1 6BE, UK
US Office: Institute of Physics Publishing, The Public Ledger Building,
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PA 19106, USA
Typeset by AldenBookset, Northampton,UK
Printed inthe UK byMPG Books Ltd,Bodmin, Cornwall
Contents
Foreword ix
SECTION 1: INTRODUCTION 1
Chapter1.1 3
High-kgate dielectrics: why do we need them?
M. Houssa (University of Provence and IMEC) and
Marc Heyns (IMEC)
SECTION 2: DEPOSITION TECHNIQUES 15
Chapter2.1 17
Atomic layer deposition
M. Ritala (University of Helsinki)
Chapter2.2 65
Chemical vapour deposition
S.A. Campbell (University of Minnesota) and
R.C. Smith (Atofina Chemicals)
Chapter2.3 89
Pulsed laser deposition of dielectrics
D. Blank, L. Doeswijk, K. Karakaya, G. Koster
and G. Rijnders (University of Twente)
SECTION 3: CHARACTERIZATION 123
Chapter3.1 125
Oxygen diffusion
R.M.C. de Almeida (University of Porto Alegre) and
I.J.R. Baumvol (Universidade de C¸ axias do Sul)
vi Contents
Chapter3.2 190
Defects in stacks of Si with nanometre thick high-k
dielectric layers: characterization and identification by
electron spin resonance
A Stesmans and V.V. Afanas’ev (University of Leuven)
Chapter3.3 217
Band alignment at the interface of Si and metals with
high-permittivity insulating oxides
V.V. Afanas’ev and A. Stesmans (University of Leuven)
Chapter3.4 251
Electrical characterization, modelling and simulation of
MOS structures with high-kgate stacks
J.L Autran, D Munteanu and M. Houssa
(University of Provence)
SECTION 4: THEORY 291
Chapter4.1 293
Defects and defect-controlled behaviour in high-kmaterials:
a theoretical perspective
M. Stoneham, A. Shluger, A. Foster and M. Szymanski
(University College of London)
Chapter4.2 325
Chemical bonding and electronic structure of high-ktransition
metal dielectrics: applications to interfacial band offset
energies and electronically active defects
G. Lucovsky and J. Whitten (North Carolina State University)
Chapter4.3 372
Electronic structure and band offsets of high dielectric
constant gate oxides
J. Robertson and P.W. Peacock (University of Cambridge)
Chapter4.4 397
Reduction of the electron mobility in high-kMOS systems
caused by remote scattering with soft interfacial optical phonons
M.V. Fischetti, D.A. Neumayer and E. Cartier (IBM–T.J. Watson)
Contents vii
Chapter4.5 431
Ab initio calculations of the structural, electronic and dynamical
properties of high-kdielectrics
G.M. Rignanese, X. Gonze (Universite´ Catholique de Louvain)
and A. Pasquarello (EPFL)
Chapter4.6 467
Defect generation under electrical stress: experimental
characterization and modelling
M. Houssa (University of Provence and IMEC)
SECTION 5: TECHNOLOGICALASPECTS 497
Chapter5.1 499
Device integration issues
E.W.A. Young (Sematech/Philips) and
V. Kaushik (Sematech/Motorola)
Chapter5.2 524
Device architectures for the nano-CMOS era
S. Deleonibus (CEA-LETI)
Chapter5.3 560
High-ktransistor characteristics
J.C. Lee and K. Onishi (University of Texas at Austin)
Appendix – PropertiesofHigh-kMaterials 597
Index 599

Foreword
The success of the semiconductor industry relies on the continuous
improvement of integrated circuits performances. This improvement is
achievedbyreducingthedimensionsofthekeycomponentofthesecircuits:
the metal–oxide–semiconductor field effect transistor (MOSFET). Indeed,
thereductionofdevicedimensionsallowstheintegrationofahighernumber
oftransistorsonachip,enablinghigherspeedandreducedcosts.Oneofthe
keyelementsthatallowedthesuccessfulscalingofsilicon-basedMOSFETsis
certainlythesuperbmaterialandelectricalpropertiesofthegatedielectricso
farusedinthesedevices,namelysilicondioxide.Thismaterialpresentsindeed
severalimportantfeaturesthatalloweditsuseasagateinsulator.Firstofall,
an amorphous silicon dioxide layer can be thermally grown on silicon with
excellentcontrolinthicknessanduniformity,andnaturallyformsaverystable
interface with the silicon substrate, with a low density of intrinsic interface
defects.Secondly,silicondioxidepresentsanexcellentthermalandchemical
stability, which is required for thefabrication oftransistors, which includes
annealing steps at high temperatures (up to 1000 8C). Next, the energy
bandgapofsilicondioxideisquitelarge,about9eV,whichconfersexcellent
electricalisolationpropertiestothismaterial,likeitslargeenergybandoffsets
withtheconductionandvalencebandsofsiliconandhighbreakdownfields,of
theorderof13MV/cm.Finally,theuseofpoly-siliconasgateelectrodeina
self-aligned CMOS (complementary metal–oxide–semiconductor) techno-
logyisalsoadeterminingfactorinthescalingofthetransistorstructures.
All these superior properties allowed the fabrication of properly
working MOSFETs with silicon dioxide gate layers as thin as 1.5nm.
However, further scaling down of the silicon dioxide gate layer thickness,
required for the future CMOS technologies, is problematic. Indeed, the
leakage current flowing through the transistors, arising from the direct
tunnelling of charge carriers, exceeds 100 A/cm2, which lies well above the
specifications given by the International Technology Roadmap for
Semiconductors, especially for low operating power and low standby
power technologies. In addition, the reliability of ultrathin silicon dioxide
layers becomes also an issue, namely the device lifetime, based on time-
dependent gate dielectric breakdown, is not expected to reach 10 years at
device operatingconditions.
x Foreword
An alternative way of decreasing the silicon dioxide thickness in
aggressivelyscaledMOSFETistouseagateinsulatorwithahigherrelative
dielectric constant k than silicon dioxide (3.9). One could then use a
physicallythickergatelayer,yetwiththesameelectricalthicknessthansub-
one nanometer silicon dioxide layers. This could potentially reduce the
leakage current flowing through the transistors and also improve the
reliability of the gate dielectrics. Consequently, tremendous worldwide
researcheffortshavebeenfocusedinrecentyearstotheinvestigationofso-
calledhigh-kgatedielectricsforthepotentialreplacementofsilicondioxide
in advanced CMOS technologies.
Thepurposeofthisbookistogiveastate-of-theartoverviewofhigh-k
gate dielectrics. The book consists of several contributions from
internationally recognized experts in the field, collected into five different
sections.Thefirstsectiongivesabriefintroductiontothefield,recallingthe
issues related to aggressive silicon dioxide thickness scaling and describing
therequirementsofalternativegatedielectrics.Section2isdevotedtothree
major deposition techniques of high-k dielectrics, i.e. atomic layer
deposition, chemical vapour deposition and pulsed laser deposition. The
physical,chemicalandelectricalcharacterizationofhigh-kgatedielectricsis
coveredinsection3.Section4dealswithimportanttheoreticalinvestigations
ofhigh-kdielectrics.Thelastsectionisdevotedtotechnologicalaspects,i.e.
to the behaviour and integration of high-kdielectrics into modern CMOS
technologies.
This book should serve as a valuable reference for researchers and
engineersworkinginthefield,aswellasagoodintroductorybookforPhD
students who wish to perform research on high-kdielectrics and advanced
CMOS technologies. It should also give a good introduction to the field of
advanced gate dielectrics for professors and students involved in graduate
andpostgraduatecoursesonmodernsemiconductordevicesandtechnology
ofadvancedintegratedcircuits.Itisworthmentioningthatthisbookisone
of thefirst toreviewthe field ofhigh-kgate dielectrics.
Acknowledgments
I would like to express my deepest gratitude to all the colleagues who have
acceptedtocontributetothisbook.Thisbookisclearlytheoutcomeoftheir
willingnesstosharetheirgreatexpertiseinthefieldofhigh-kgatedielectrics,
resulting in chapters of very high scientific quality. I want to acknowledge
themallforthetimeandefforttheyhavespentinpreparingtheircontributed
chapters.AttheInstituteofPhysicsPublishing,IamindebtedtoTomSpicer,
Senior Commissioning Editor, and to Simon Laurenson, Production
Manager, as well as their coworkers. Thanks to them, this review book
project became a reality. My colleagues at IMEC and the University of
Foreword xi
Provencearealsogratefullyacknowledgedforthestimulatingdiscussionswe
shared. Last but not least, I wish to thank my wife, Nathalie, and my son,
Arnaud. Their encouragements and continuous support helped me
considerably inpreparing this monograph.
Michel Houssa
Leuven,Belgium
October2003