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ESD testing: from components to systems PDF

319 Pages·2016·12.184 MB·English
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(cid:2) ESD TESTING (cid:2) (cid:2) (cid:2) (cid:2) ESDSeries ESD:CircuitsandDevices,2ndEdition June2015 ESD:AnalogCircuitsandDesign October2014 ElectricalOverstress(EOS):Devices,CircuitsandSystems October2013 ESDBasics:FromSemiconductorManufacturingtoProductUse September2012 ESD:DesignandSynthesis March2011 ESD:FailureMechanismsandModels July2009 Latchup December2007 (cid:2) (cid:2) ESD:RFTechnologyandCircuits September2006 ESD:CircuitsandDevices November2005 ESDPhysicsandDevices September2004 (cid:2) (cid:2) ESD TESTING FROM COMPONENTS TO SYSTEMS StevenH.Voldman IEEEFellow,NewYork,USA (cid:2) (cid:2) (cid:2) (cid:2) Thiseditionfirstpublished2017 ©2017Wiley Registeredoffice JohnWiley&SonsLtd,TheAtrium,SouthernGate,Chichester,WestSussex,PO198SQ,UnitedKingdom Fordetailsofourglobaleditorialoffices,forcustomerservicesandforinformationabouthowtoapplyfor permissiontoreusethecopyrightmaterialinthisbookpleaseseeourwebsiteatwww.wiley.com. TherightoftheauthortobeidentifiedastheauthorofthisworkhasbeenassertedinaccordancewiththeCopyright, DesignsandPatentsAct1988. Allrightsreserved.Nopartofthispublicationmaybereproduced,storedinaretrievalsystem,ortransmitted,inany formorbyanymeans,electronic,mechanical,photocopying,recordingorotherwise,exceptaspermittedbytheUK Copyright,DesignsandPatentsAct1988,withoutthepriorpermissionofthepublisher. Wileyalsopublishesitsbooksinavarietyofelectronicformats.Somecontentthatappearsinprintmaynotbe availableinelectronicbooks. Designationsusedbycompaniestodistinguishtheirproductsareoftenclaimedastrademarks.Allbrandnamesand productnamesusedinthisbookaretradenames,servicemarks,trademarksorregisteredtrademarksoftheir respectiveowners.Thepublisherisnotassociatedwithanyproductorvendormentionedinthisbook. LimitofLiability/DisclaimerofWarranty:Whilethepublisherandauthorhaveusedtheirbesteffortsinpreparing thisbook,theymakenorepresentationsorwarrantieswithrespecttotheaccuracyorcompletenessofthecontentsof thisbookandspecificallydisclaimanyimpliedwarrantiesofmerchantabilityorfitnessforaparticularpurpose.Itis soldontheunderstandingthatthepublisherisnotengagedinrenderingprofessionalservicesandneitherthe publishernortheauthorshallbeliablefordamagesarisingherefrom.Ifprofessionaladviceorotherexpert assistanceisrequired,theservicesofacompetentprofessionalshouldbesought. (cid:2) LibraryofCongressCataloging-in-PublicationData (cid:2) Names:Voldman,StevenH.,author. Title:ESDtesting:fromcomponentstosystems/StevenH.Voldman. Othertitles:Electrostaticdischargetesting|ESDseries. Description:Chichester,UK;Hoboken,NJ:JohnWiley&Sons,2016.| Series:ESDseries|Includesbibliographicalreferencesandindex. Identifiers:LCCN2016023736(print)|LCCN2016033086(ebook)|ISBN 9780470511916(cloth)|ISBN9781118707142(pdf)|ISBN9781118707159 (epub) Subjects:LCSH:Electroniccircuits–Effectofradiationon.|Electronic apparatusandappliances–Testing.|Electricdischarges–Detection.| Electricdischarges–Measurement.|Electrostatics. Classification:LCCTK7870.285.V652016(print)|LCCTK7870.285(ebook)| DDC621.3815/4–dc23 LCrecordavailableathttps://lccn.loc.gov/2016023736 AcataloguerecordforthisbookisavailablefromtheBritishLibrary. Setin10/12pt,TimesLTStdbySPiGlobal,Chennai,India. 1 2017 (cid:2) (cid:2) To My Parents Carl and Blossom Voldman (cid:2) (cid:2) (cid:2) (cid:2) Contents AbouttheAuthor xvii Preface xix Acknowledgments xxiii 1 Introduction 1 1.1 TestingforESD,EMI,EOS,EMC,andLatchup 1 1.2 ComponentandSystemLevelTesting 1 1.3 QualificationTesting 2 (cid:2) 1.4 ESDStandards 3 (cid:2) 1.4.1 StandardDevelopment – StandardPractice(SP)andStandardTest Methods(STMs) 3 1.4.2 Repeatability 4 1.4.3 Reproducibility 4 1.4.4 RoundRobinTesting 4 1.4.5 RoundRobinStatisticalAnalysis – k-Statistics 5 1.4.6 RoundRobinStatisticalAnalysis – h-Statistics 6 1.5 ComponentLevelStandards 6 1.6 SystemLevelStandards 7 1.7 FactoryandMaterialStandards 7 1.8 CharacterizationTesting 8 1.8.1 SemiconductorComponentLevelCharacterization 9 1.8.2 SemiconductorDeviceLevelCharacterization 9 1.8.3 WaferLevelESDCharacterizationTesting 9 1.8.4 DeviceCharacterizationTestsonCircuits 10 1.8.5 DeviceCharacterizationTestsonComponents 10 1.8.6 SystemlevelCharacterizationonComponents 11 1.8.7 TestingtoStandardSpecificationLevels 11 1.8.8 TestingtoFailure 11 1.9 ESDLibraryCharacterizationandQualification 12 1.10 ESDComponentStandardsandChipArchitectures 12 (cid:2) (cid:2) viii Contents 1.10.1 RelationshipBetweenESDStandardPinCombinationsandFailure Mechanisms 12 1.10.2 RelationshipBetweenESDStandardPinCombinationsandChip Architecture 13 1.11 SystemLevelCharacterization 13 1.12 SummaryandClosingComments 13 Problems 14 References 15 2 HumanBodyModel 17 2.1 History 17 2.2 Scope 18 2.3 Purpose 18 2.4 PulseWaveform 18 2.5 EquivalentCircuit 19 2.6 TestEquipment 20 2.7 TestSequenceandProcedure 23 2.8 FailureMechanisms 25 2.9 HBMESDCurrentPaths 26 2.10 HBMESDProtectionCircuitSolutions 28 2.11 AlternateTestMethods 32 2.11.1 HBMSplitFixtureTesting 32 2.11.2 HBMSampleTesting 33 (cid:2) (cid:2) 2.11.3 HBMWaferLevelESDTesting 33 2.11.4 HBMTestExtractionAcrosstheDeviceUnderTest(DUT) 33 2.12 HBMTwo-PinStress 34 2.12.1 HBMTwo-PinStress – Advantages 37 2.12.2 HBMTwo-PinStress – PinCombinations 37 2.13 HBMSmallStepStress 37 2.13.1 HBMSmallStepStress – Advantages 38 2.13.2 HBMSmallStepStress – DataAnalysisMethods 38 2.13.3 HBMSmallStepStress – DesignOptimization 38 2.14 SummaryandClosingComments 38 Problems 39 References 39 3 MachineModel 43 3.1 History 43 3.2 Scope 43 3.3 Purpose 43 3.4 PulseWaveform 44 3.4.1 ComparisonofMachineModel(MM)andHumanBodyModel (HBM)PulseWaveform 44 3.5 EquivalentCircuit 45 3.6 TestEquipment 45 (cid:2) (cid:2) Contents ix 3.7 TestSequenceandProcedure 47 3.8 FailureMechanisms 49 3.9 MMESDCurrentPaths 49 3.10 MMESDProtectionCircuitSolutions 52 3.11 AlternateTestMethods 55 3.11.1 SmallChargeModel(SCM) 55 3.12 MachineModeltoHumanBodyModelRatio 57 3.13 MachineModelStatusasanESDStandard 58 3.14 SummaryandClosingComments 58 Problems 59 References 59 4 ChargedDeviceModel(CDM) 61 4.1 History 61 4.2 Scope 61 4.3 Purpose 62 4.4 PulseWaveform 62 4.4.1 ChargedDeviceModelPulseWaveform 62 4.4.2 ComparisonofChargedDeviceModel(CDM)andHumanBody Model(HBM)PulseWaveform 63 4.5 EquivalentCircuit 65 4.6 TestEquipment 65 4.7 TestSequenceandProcedure 67 (cid:2) (cid:2) 4.8 FailureMechanisms 69 4.9 CDMESDCurrentPaths 70 4.10 CDMESDProtectionCircuitSolutions 72 4.11 AlternativeTestMethods 74 4.11.1 AlternativeTestMethods – SocketedDeviceModel(SDM) 74 4.12 ChargedBoardModel(CBM) 75 4.12.1 ComparisonofChargedBoardModel(CBM)andChargedDevice Model(CDM)PulseWaveform 75 4.12.2 ChargedBoardModel(CBM)asanESDStandard 77 4.13 SummaryandClosingComments 77 Problems 79 References 80 5 TransmissionLinePulse(TLP)Testing 84 5.1 History 84 5.2 Scope 85 5.3 Purpose 85 5.4 PulseWaveform 86 5.5 EquivalentCircuit 87 5.6 TestEquipment 88 5.6.1 CurrentSource 90 5.6.2 TimeDomainReflection(TDR) 90 (cid:2) (cid:2) x Contents 5.6.3 TimeDomainTransmission(TDT) 91 5.6.4 TimeDomainReflectionandTransmission(TDRT) 91 5.6.5 CommercialTransmissionLinePulse(TLP)Systems 92 5.7 TestSequenceandProcedure 95 5.7.1 TLPPulseAnalysis 96 5.7.2 MeasurementWindow 96 5.7.3 MeasurementAnalysis – TDRVoltageWaveform 96 5.7.4 MeasurementAnalysis – TimeDomainReflection(TDR)Current Waveform 97 5.7.5 MeasurementAnalysis – TimeDomainReflection(TDR) Current–VoltageCharacteristic 98 5.8 TLPPulsedI–V Characteristic 98 5.8.1 TLPI–VCharacteristicKeyParameters 99 5.8.2 TLPPowerVersusTime 99 5.8.3 TLPPowerVersusTime – MeasurementAnalysis 100 5.8.4 TLPPower-to-FailureVersusPulseWidthPlot 100 5.9 AlternateMethods 101 5.9.1 LongDurationTLP(LD-TLP) 101 5.9.2 LongDurationTLPTimeDomain 102 5.10 TLP-to-HBMRatio 104 5.10.1 ComparisonofTransmissionLinePulse(TLP)andHumanBody Model(HBM)PulseWidth 104 (cid:2) 5.11 SummaryandClosingComments 104 (cid:2) Problems 104 References 105 6 VeryFastTransmissionLinePulse(VF-TLP)Testing 108 6.1 History 108 6.2 Scope 108 6.3 Purpose 108 6.4 PulseWaveform 109 6.4.1 ComparisonofVF-TLPVersusTLPWaveform 110 6.5 EquivalentCircuit 111 6.6 TestEquipmentConfiguration 111 6.6.1 CurrentSource 112 6.6.2 TimeDomainReflection(TDR) 112 6.6.3 TimeDomainTransmission(TDT) 112 6.6.4 TimeDomainReflectionandTransmission(TDRT) 113 6.6.5 EarlyVF-TLPSystems 114 6.6.6 CommercialVF-TLPTestSystems 116 6.7 TestSequenceandProcedure 117 6.7.1 VF-TLPPulseAnalysis 118 6.7.2 MeasurementWindow 118 6.7.3 MeasurementAnalysis – VF-TLPVoltageWaveform 118 6.7.4 MeasurementAnalysis – TimeDomainReflectometry(TDR)Current Waveform 118 (cid:2) (cid:2) Contents xi 6.7.5 MeasurementAnalysis – TimeDomainTransmission(TDR) Current–VoltageCharacteristics 119 6.8 VF-TLPPulsedI–V Characteristics 121 6.8.1 VF-TLPPulsedI–VCharacteristicKeyParameters 121 6.8.2 VF-TLPPowerVersusTimePlot 122 6.8.3 VF-TLPPowerVersusTime – MeasurementAnalysis 123 6.8.4 VF-TLPPower-to-FailureVersusPulseWidthPlot 123 6.8.5 VF-TLPandTLPPower-to-FailurePlot 124 6.9 AlternateTestMethods 124 6.9.1 RadioFrequency(RF)VF-TLPSystems 124 6.9.2 UltrafastTransmissionLinePulse(UF-TLP) 125 6.10 SummaryandClosingComments 125 Problems 128 References 128 7 IEC61000-4-2 130 7.1 History 130 7.2 Scope 130 7.3 Purpose 130 7.3.1 AirDischarge 131 7.3.2 DirectContactDischarge 131 7.4 PulseWaveform 131 (cid:2) 7.4.1 PulseWaveformEquation 132 (cid:2) 7.5 EquivalentCircuit 133 7.6 TestEquipment 133 7.6.1 TestConfiguration 134 7.6.2 ESDGuns 134 7.6.3 ESDGuns – StandardVersusDischargeModule 135 7.6.4 HumanBodyModelVersusIEC61000-4-2 135 7.7 TestSequenceandProcedure 135 7.8 FailureMechanisms 137 7.9 IEC61000-4-2ESDCurrentPaths 138 7.10 ESDProtectionCircuitrySolutions 139 7.11 AlternativeTestMethods 140 7.11.1 AutomotiveESDStandards 141 7.11.2 MedicalESDStandards 142 7.11.3 AvionicESDStandard 143 7.11.4 Military-RelatedESDStandard 143 7.12 SummaryandClosingComments 143 Problems 143 References 144 8 HumanMetalModel(HMM) 147 8.1 History 147 8.2 Scope 147 8.3 Purpose 148 (cid:2)

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