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Moreinformationaboutthisseriesathttp://www.springer.com/series/10059 Hugo Alexandre de Andrade Serra • Nuno Paulino Design of Switched-Capacitor Filter Circuits using Low Gain Amplifiers 2123 HugoAlexandredeAndradeSerra NunoPaulino FaculdadedeCiênciaseTecnologia DepartmentofElectricalEngineering UNINOVA UNINOVA Caparica Caparica Portugal Portugal ISSN2191-8112 ISSN2191-8120(electronic) SpringerBriefsinElectricalandComputerEngineering ISBN978-3-319-11790-4 ISBN978-3-319-11791-1(eBook) DOI10.1007/978-3-319-11791-1 LibraryofCongressControlNumber:2014954623 SpringerChamHeidelbergNewYorkDordrechtLondon © SpringerInternationalPublishingSwitzerland2015 Thisworkissubjecttocopyright.AllrightsarereservedbythePublisher,whetherthewholeorpartofthe materialisconcerned,specificallytherightsoftranslation,reprinting,reuseofillustrations,recitation, broadcasting,reproductiononmicrofilmsorinanyotherphysicalway,andtransmissionorinformation storageandretrieval,electronicadaptation,computersoftware,orbysimilarordissimilarmethodology nowknownorhereafterdeveloped. Theuseofgeneraldescriptivenames,registerednames,trademarks,servicemarks,etc.inthispublication doesnotimply,evenintheabsenceofaspecificstatement,thatsuchnamesareexemptfromtherelevant protectivelawsandregulationsandthereforefreeforgeneraluse. Thepublisher,theauthorsandtheeditorsaresafetoassumethattheadviceandinformationinthisbook arebelievedtobetrueandaccurateatthedateofpublication.Neitherthepublishernortheauthorsorthe editorsgiveawarranty,expressorimplied,withrespecttothematerialcontainedhereinorforanyerrors oromissionsthatmayhavebeenmade. Printedonacid-freepaper SpringerispartofSpringerScience+BusinessMedia(www.springer.com) Preface Analogfiltersareextremelyimportantblocksinseveralelectronicsystemssuchas RF transceivers or sigma delta modulators. They allow selecting between signals withdifferentfrequencyandeliminatingunwantedsignals. Inmoderndeep-submicronCMOStechnologiestheintrinsicgainofthetransistors is low and has a large variability, making the design of moderate and high gain amplifiersextremelydifficult. Theobjectiveofthisbookistostudyswitched-capacitor(SC)circuitsbasedonthe low-passandband-passSallen-Keytopologies,sincetheydonotrequirehighgain amplifiers. Thestrategyusedtoachievethisobjectiveistoreplacetheoperational amplifier (opamp) with a voltage buffer. Doing this simplifies the design of the amplifieralthoughitalsoeliminatesthevirtualgroundnodefromthecircuit.Without thisnodeparasiticinsensitiveSCnetworkscannotbeused.Duetomodernparasitic extractionsoftwarethatcanreliablypredictthevaluesofparasiticcapacitances,the historicaldisadvantageofparasiticsensitiveSCnetworks(parallelSC)isnolonger critical,allowingitsinfluencetobecompensatedduringthedesignprocess. Different types of switches were simulated to determine the one with the least non-linear effects. Two techniques (common mode voltage adjustment and source degeneration)wereusedtoreducethedistortionintroducedbythebuffers. Low-pass(secondandsixthorder)andband-pass(secondandfourthorder)SC filtersweresimulatedindifferentialconfigurationinstandard130nmCMOStech- nology,havingobtainedforthelow-passfilteradistortionof−62dBforthebiquad sectionand−54dBforthesixth-orderfilter,foracutofffrequencyof1MHzand whenoperatingat100MHzofclockfrequency.Thetotalpowerconsumptionwas 986μW(i.e.986×10−6)and5.838mW,respectively. v Acknowledgements This work was supported by projects DISRUPTIVE (EXCL/EEI-ELC/0261/2012) andPEST(PEst-OE/EEI/UI0066/2014). vii Contents 1 Introduction................................................... 1 2 Switched-CapacitorCircuits..................................... 3 2.1 Switched-CapacitorFiltersBuildingBlocks .................... 3 2.1.1 OperationalAmplifiers................................ 3 2.1.2 Switches............................................ 3 2.1.3 Capacitors .......................................... 5 2.1.4 Non-OverlappingClockPhases ........................ 5 2.2 Switched-CapacitorResistorEmulationNetworks ............... 5 2.2.1 Parasitic-SensitiveIntegrator........................... 7 2.2.2 Parasitic-InsensitiveIntegrator ......................... 8 2.2.3 SignalFlowGraphAnalysis ........................... 10 2.3 Sallen-KeyTopology........................................ 11 2.3.1 Low-PassSallen-KeyTopology ........................ 12 2.3.2 Band-PassSallen-KeyTopology........................ 13 3 Low-PassFilterTopologies ...................................... 15 3.1 Continuous-TimeSallen-KeyLow-PassFilter................... 15 3.2 Switched-CapacitorLow-PassFilter........................... 16 3.2.1 Single-EndedSwitched-CapacitorLow-PassFilter ........ 16 3.2.2 DifferentialSwitched-CapacitorLow-PassFilter .......... 18 3.3 Switched-CapacitorFiltersUsingCascadedSections............. 19 3.4 Conclusions ............................................... 22 4 Band-PassFilterTopologies ..................................... 23 4.1 Continuous-timeSallen-KeyBand-PassFilter................... 23 4.2 Switched-CapacitorBand-PassFilter .......................... 24 4.2.1 Single-EndedSwitched-CapacitorBand-PassFilter........ 24 4.2.2 DifferentialSwitched-CapacitorBand-PassFilter ......... 26 4.3 Switched-CapacitorFiltersUsingCascadedSections............. 26 4.4 Conclusions ............................................... 28 ix x Contents 5 Non-IdealEffects............................................... 29 5.1 Non-linearEffectsduetoRealSwitches........................ 29 5.1.1 FilterAnalysis....................................... 29 5.1.2 SimulationResults ................................... 30 5.2 ClockBoostCircuit......................................... 33 5.2.1 ClockBoostCircuitAnalysis .......................... 33 5.2.2 SimulationResults ................................... 36 5.3 Low-VoltageClockBoostCircuit ............................. 37 5.3.1 Low-VoltageClockBoostCircuitAnalysis ............... 37 5.3.2 SimulationResults ................................... 38 5.4 SourceFollowerwithg Compensation ....................... 41 ds 5.4.1 SourceFollowerwithg Compensation ................. 41 ds 5.4.2 ComplementarySourceFollowerwithg Compensation... 45 ds 5.4.3 SourceFollowerwithg andBodyEffectCompensation... 47 ds 5.4.4 SimulationResults ................................... 50 5.5 Low-VoltageFully-DifferentialVoltage-Combiner ............... 52 5.5.1 Fully-DifferentialVoltageCombiner .................... 53 5.5.2 ComplementaryFully-DifferentialVoltage-Combiner ...... 57 5.5.3 SimulationResults ................................... 59 6 SwitchedCapacitorFilterImplementation ........................ 63 6.1 Second-OrderLow-PassSCFilter............................. 63 6.1.1 Filter using Clock Boost and Complementary Source Followerwithg Compensation....................... 64 ds 6.1.2 FilterUsingLow-VoltageClockBoostandVoltageCombiner at1.2V............................................ 65 6.1.3 FilterUsingLow-VoltageClockBoostandVoltageCombiner at0.9V............................................ 67 6.2 Sixth-OrderLow-PassSCFilter .............................. 67 6.2.1 SectionwithLowQualityFactor ....................... 68 6.2.2 SectionwithMediumQualityFactor .................... 68 6.2.3 SectionwithHighQualityFactor ....................... 70 6.2.4 CascadedSections ................................... 71 6.3 Second-OrderBand-PassSCFilter ............................ 72 6.4 Fourth-OrderBand-PassSCFilter............................. 74 6.4.1 FirstFilterSection ................................... 75 6.4.2 SecondFilterSection ................................. 75 6.4.3 CascadedSections ................................... 78 7 Conclusion .................................................... 79 AppendixAButterworthFilteringTransferFunction.................. 83 A.1 Continuous-TimeLow-PassButterworthTransferFunction........ 83 A.1.1 First-OrderPrototypeTransferFunction ................. 84 A.1.2 Second-OrderPrototypeTransferFunction ............... 84 Contents xi A.2 Discrete-TimeLow-PassButterworthTransferFunction .......... 85 A.2.1 First-OrderPrototypeTransferFunction ................. 85 A.2.2 Second-OrderPrototypeTransferFunction ............... 86 A.3 Continuous-TimeBand-PassButterworthTransferFunction....... 86 A.4 Discrete-TimeBand-PassButterworthTransferFunction.......... 87 A.4.1 Second-OrderPrototypeTransferFunction ............... 87 AppendixBImpulseResponseSimulationandBodeDiagramPlotting 89 References........................................................ 91
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