Design of low power, low noise instrumentation amplifiers for MEMS sensor interfacing

220 Pages·2013·11.62 MB·English

UNIVERSITÀ DI PISA

Scuola di Dottorato in Ingegneria “Leonardo da Vinci”

Corso di Dottorato di Ricerca in
INGEGNERIA DELL’INFORMAZIONE
Settore Scientifico-Disciplinare ING-INF/01

Tesi di Dottorato di Ricerca
Design of low power, low noise
instrumentation amplifiers for MEMS
sensor interfacing

Autore:
Federico Butti
Relatori:
Prof. Paolo Bruschi
Ing Giovanni Pennelli
Ing. Massimo Piotto
Anno 2013

Sommario
La presente tesi di dottorato tratta del progetto di ampli(cid:28)catori da strumen-
tazione in tecnologia CMOS atti ad interfacciare sensori MEMS resistivi. Il
progetto di un ampli(cid:28)catore da strumentazione a basso o(cid:27)set e basso rumore,
utilizzatoperlaletturadisensoridi(cid:29)ussoMEMS,vieneampliamentediscusso.
Perraggiungerel’elevatarisoluzionerichiesta, sonostateutilizzatetecnichedi-
namiche,comeadesempiolamodulazionechoppereilmatchingdinamicodelle
portediingresso. Lastrettabandadifrequenzerichiestadall’applicazioneviene
ottenuta implementando nell’ampli(cid:28)catore stesso un (cid:28)ltaggio passa-basso del
secondoordine. Sonoinoltrestatifornitideicriteriperlaprogettazioneottima
di (cid:28)ltri a bassa frequenza.
In(cid:28)ne, viene presentato il progetto di un ampli(cid:28)catore da strumentazione per
sensori magnetici integrati, sviluppato presso NXP Semiconductors (NL), du-
rante una internship di 8 mesi, svolta all’interno del Programma di Dottorato.
i

Abstract
ThisPh.D.thesisdealswiththedesignofCMOSinstrumentationampli(cid:28)erfor
resistiveMEMSsensorinterfacing. Thedesignofalow-o(cid:27)set,low-noiseinstru-
mentationampli(cid:28)er,targetedtotheread-outofMEMSthermal(cid:29)owsensors,is
presented. Toachievethehighresolutionrequired,dynamictechniquessuchas
chopper modulation, dynamic element matching and port-swapping have been
used. The narrow bandwidth required for this applications has been obtained
implementing in the ampli(cid:28)er block also a second order (cid:28)ltering function. Op-
timumdesigncriteriaforlow-frequency(cid:28)lteroptimizationhavebeendeveloped
and are also reported.
Finally,thedesignofanhighgain-matchingmulti-channelinstrumentationam-
pli(cid:28)erforintegratedmagneticsensors,carriedoutduringaninternshipatNXP
Semiconductors, has been discussed.
iii

Contents
Contents v
Introduction 1
1 MEMS (cid:29)ow sensors 3
1.1 MEMS and microsensor market . . . . . . . . . . . . . . . . . . 3
1.2 MEMS CMOS thermal sensors . . . . . . . . . . . . . . . . . . 4
1.3 MEMS (cid:29)ow sensors . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.3.1 MEMS thermal (cid:29)ow sensors . . . . . . . . . . . . . . . . 6
1.4 CMOS integrated calorimetric (cid:29)ow meters . . . . . . . . . . . . 9
1.4.1 Principle of operations . . . . . . . . . . . . . . . . . . . 9
1.4.2 Device fabrication . . . . . . . . . . . . . . . . . . . . . 13
1.5 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2 Low o(cid:27)set ampli(cid:28)ers 19
2.1 O(cid:27)set in CMOS circuits . . . . . . . . . . . . . . . . . . . . . . 19
2.1.1 O(cid:27)set modelling . . . . . . . . . . . . . . . . . . . . . . 20
2.1.2 O(cid:27)set in current mirrors and di(cid:27)erential ampli(cid:28)ers . . . 20
2.2 Dynamic o(cid:27)set compensation techniques . . . . . . . . . . . . . 22
2.2.1 Autozero and Correlated Double Sampling . . . . . . . 23
2.2.2 Chopper modulation . . . . . . . . . . . . . . . . . . . . 31
2.2.3 O(cid:27)set ripple. . . . . . . . . . . . . . . . . . . . . . . . . 34
2.2.4 Modulator non-idealities and residual o(cid:27)set . . . . . . . 35
2.3 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
v
CONTENTS
3 Low-noise, low-o(cid:27)set instrumentation ampli(cid:28)ers 41
3.1 Instrumentation ampli(cid:28)er characteristics . . . . . . . . . . . . . 41
3.2 Instrumentation ampli(cid:28)er topologies . . . . . . . . . . . . . . . 46
3.2.1 3-op-amp instrumentation ampli(cid:28)er . . . . . . . . . . . 46
3.2.2 Current Feedback Instrumentation Ampli(cid:28)ers . . . . . . 47
3.3 Low o(cid:27)set current feedback instrumentation ampli(cid:28)ers . . . . . 50
3.3.1 Chopper-modulatedcurrentfeedbackinstrumentationam-
pli(cid:28)ers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
3.3.2 Ripple reduction techniques . . . . . . . . . . . . . . . . 52
3.3.3 Mixed approaches for instrumentation ampli(cid:28)er design . 58
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
4 An instrumentation ampli(cid:28)er for MEMS (cid:29)ow sensor interfac-
ing 65
4.1 Design target and speci(cid:28)cations . . . . . . . . . . . . . . . . . . 65
4.2 Port-swapping technique . . . . . . . . . . . . . . . . . . . . . . 67
4.2.1 Input impedance of a chopper ampli(cid:28)er . . . . . . . . . 67
4.2.2 Input currents in a CFIA . . . . . . . . . . . . . . . . . 69
4.2.3 Port-swapping technique . . . . . . . . . . . . . . . . . . 71
4.2.4 Common-mode related issues . . . . . . . . . . . . . . . 76
4.3 Ampli(cid:28)er description . . . . . . . . . . . . . . . . . . . . . . . . 78
4.3.1 Simpli(cid:28)ed architecture . . . . . . . . . . . . . . . . . . . 78
4.3.2 G C implementation . . . . . . . . . . . . . . . . . . . 80
m
4.3.3 Fully-di(cid:27)erential implementation . . . . . . . . . . . . . 82
4.3.4 Common-mode related issues correction . . . . . . . . . 88
4.4 Circuit implementation. . . . . . . . . . . . . . . . . . . . . . . 91
4.4.1 Noise analysis . . . . . . . . . . . . . . . . . . . . . . . . 92
4.4.2 Input modulator . . . . . . . . . . . . . . . . . . . . . . 94
4.4.3 Preampli(cid:28)er design . . . . . . . . . . . . . . . . . . . . . 95
4.4.4 G design . . . . . . . . . . . . . . . . . . . . . . . . . 100
m3
4.4.5 INT2 design . . . . . . . . . . . . . . . . . . . . . . . . . 103
4.4.6 OA-CM design . . . . . . . . . . . . . . . . . . . . . . . 105
4.4.7 Modulator SA-FB design . . . . . . . . . . . . . . . . . 107
4.5 Simulations and characterization . . . . . . . . . . . . . . . . . 107
4.6 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
vi
CONTENTS
5 Smart chip design and layout 117
5.1 Programmable current mirror design . . . . . . . . . . . . . . . 117
5.2 Additional blocks . . . . . . . . . . . . . . . . . . . . . . . . . . 121
5.3 Floorplan and layout of the System-on-Chip . . . . . . . . . . . 121
5.4 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
6 Optimization of very low frequency G C integrators 125
m
6.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
6.2 Integrator topology and modelling . . . . . . . . . . . . . . . . 128
6.2.1 Optimization for minimum area occupation . . . . . . . 132
6.3 Optimization routine for integrator design . . . . . . . . . . . . 134
6.3.1 Optimization results . . . . . . . . . . . . . . . . . . . . 135
6.3.2 Routine accuracy . . . . . . . . . . . . . . . . . . . . . . 139
6.4 Routine re(cid:28)nement and accuracy improvement . . . . . . . . . 141
6.5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
7 Designofacompactinstrumentationampli(cid:28)erwithhighchannel-
gain matching for AMR sensors 151
7.1 Motivations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
7.1.1 AMR Sensors . . . . . . . . . . . . . . . . . . . . . . . . 152
7.1.2 Rotational speed and angular position magnetic sensors 154
7.1.3 MultiPurpose Front-End for AMR sensors . . . . . . . . 156
7.2 Front-end speci(cid:28)cations . . . . . . . . . . . . . . . . . . . . . . 158
7.2.1 Gain and gain mismatch . . . . . . . . . . . . . . . . . . 158
7.2.2 Input noise and o(cid:27)set . . . . . . . . . . . . . . . . . . . 160
7.2.3 Linearity . . . . . . . . . . . . . . . . . . . . . . . . . . 163
7.2.4 Output stage and driving capabilities . . . . . . . . . . 164
7.2.5 HEXAGON speci(cid:28)cations summary . . . . . . . . . . . 166
7.3 HEXAGON architecture . . . . . . . . . . . . . . . . . . . . . . 166
7.3.1 Topology choice. . . . . . . . . . . . . . . . . . . . . . . 166
7.3.2 HEXAGON topology. . . . . . . . . . . . . . . . . . . . 167
7.3.3 Common-mode feedback . . . . . . . . . . . . . . . . . . 176
7.4 Circuit design . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179
7.4.1 Noise analysis . . . . . . . . . . . . . . . . . . . . . . . . 179
7.4.2 Feedback network . . . . . . . . . . . . . . . . . . . . . 180
7.4.3 Switches design . . . . . . . . . . . . . . . . . . . . . . . 180
vii
CONTENTS
7.4.4 Input stage . . . . . . . . . . . . . . . . . . . . . . . . . 183
7.4.5 Class AB control and output stage . . . . . . . . . . . . 187
7.4.6 Phase generator . . . . . . . . . . . . . . . . . . . . . . 189
7.5 Simulations and expected performances . . . . . . . . . . . . . 189
7.5.1 DC O(cid:27)set . . . . . . . . . . . . . . . . . . . . . . . . . . 189
7.5.2 O(cid:27)set . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190
7.5.3 Gain Matching . . . . . . . . . . . . . . . . . . . . . . . 191
7.5.4 Noise performances . . . . . . . . . . . . . . . . . . . . . 192
7.5.5 Periodic AC, linearity and crosstalk . . . . . . . . . . . 193
7.5.6 CMRR and PSRR . . . . . . . . . . . . . . . . . . . . . 196
7.5.7 Stability . . . . . . . . . . . . . . . . . . . . . . . . . . . 197
7.5.8 Current Consumption . . . . . . . . . . . . . . . . . . . 198
7.5.9 Output impedance and ADC interfacing . . . . . . . . . 199
7.5.10 Benchmark . . . . . . . . . . . . . . . . . . . . . . . . . 202
7.6 Layout and post-layout simulations . . . . . . . . . . . . . . . . 202
7.6.1 Modulator layout . . . . . . . . . . . . . . . . . . . . . . 202
7.6.2 HEXAGON layout . . . . . . . . . . . . . . . . . . . . . 203
7.6.3 Post-layout simulations . . . . . . . . . . . . . . . . . . 204
7.7 Conclusions and future developments . . . . . . . . . . . . . . . 205
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206
Conclusions 209
viii