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Delta Sigma ADC Overview PDF

56 Pages·2014·1.04 MB·English
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Department of Electrical and Computer Engineering Delta-Sigma Analog-to-Digital Converters Brief Overview Vishal Saxena, Boise State University ([email protected]) © Vishal Saxena -1- Analog to Digital Converter Architectures Resolution (bits) 25 20 Integrating Oversampling S/H with 1ps rms jitter 15 SAR, 10 Algorithmic Pipelined, Folding,Flash, 5 Time-Interleaved 1k 10k 100k 1M 10M 100M 1G 10G Bandwidth (Hz) © Vishal Saxena -2- Why larger overlap on S AR and OS? Sometimes oversampling modulators are preferred over  SAR. Why? Nyquist rate SAR converters can’s support complete  bandwidth due to stringent requirements on Anti-aliasing Filters. Consider a data converter with 250 ksps output rate.  For oversampled modulator OSR=64, input is sampled at  16 MHz. Nyquist rate SAR samples the input at 500 kHz.  Requirements on anti-aliasing filter in the second case is  very hard compared to oversampling case. © Vishal Saxena -3- Quantization Basics N y v ….11000101…. Quantizer Continuous Discrete amplitude represented amplitude by a binary code Modeling N y DAC v Quantizer Analog representation of the discrete amplitude Quantization error/noise: e[n] = v[n]–y[n]  Least significant bit (LSB): Δ  Quantizer has non-linear input-output characteristics  Exact analytical modeling is difficult   Use a simplified model © Vishal Saxena -4- Quantizer Modeling Linearized Quantizer model e[n] y v y k v q Quantizer Quantization noise modeling can be simplified with the assumptions   Input (y) stays within the no-overload input range  e[n] is uncorrelated with the input y  Spectrum of e[n] is white  Quantization noise is uniformly distributed Linearized quantizer model   AWUN noise Quantization noise power:  2 2  e 12 SQNR = 6.02·N + 1.76  © Vishal Saxena -5- Quantizer Modeling Linearized Quantizer model e[n] y v y k v q Quantizer Linear quantizer model holds true for large number of quantization  levels and when the input is varying fast Linear quantizer model breaks down when   Input (y) is not varying fast  Input (y) is periodic with a frequency harmonically related to fs  Quantizer overload With quantizer overload, the effective gain of the quantizer drops as the  input amplitude inscreases © Vishal Saxena -6- Mid-Rise Quantizer (ev en number of levels) Step rising at y=0 (mid-rise).  In this figure (DSM toolbox model), LSB= Δ= 2  M = Number of steps, (M is odd here)   Number of levels (nLev) = M+1, (even) Input thresholds: 0, ±2, ……, ±(M–1).  Output levels: ±1, ±3, ……, ±M.  © Vishal Saxena -7- Mid-Tread Quantizer (od d number of levels)  Flat part of the step at y=0 (mid-tread).  Here, LSB= Δ= 2  M = Number of steps, (M is even here) • Number of levels (nLev) = M+1, (odd)  Input thresholds: 0, ±2, ……, ±(M–1).  Output levels: 0, ±2, ±4, ……, ±M. © Vishal Saxena -8- Quantizer Characteristic s : Slow ramp input Quantization 40 y[n] 20 v[n] 0 -20 -40 0 100 200 300 400 500 600 700 800 samples 10 e[n] 5 0 -5 -10 0 100 200 300 400 500 600 700 800 samples © Vishal Saxena -9- Quantizer Characteristic s : Sine input Quantization 10 y[n] 5 v[n] 0 -5 -10 0 100 200 300 400 500 600 700 800 samples 1 e[n] 0.5 0 -0.5 -1 0 100 200 300 400 500 600 700 800 samples © Vishal Saxena -10-

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Analog to Digital Converter Architectures .. Reference: Stability theory from the Yellow Bible of delta-sigma Systematic NTF Design Procedure .. B.8 R. Schreier, J. Silva, J. Steensgaard, G. C. Temes,“Design-Oriented Estimation.
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