Data Acq Using ADC0816 & ADC0817 8-Bit ADC w/On-Chip 16 Chan Multiplexr

28 Pages·2011·0.71 MB·English

ADC0808,ADC0809,ADC0816,ADC0817,LF356,
LF398
Application Note 258 Data Acquisition Using the ADC0816 and ADC0817 8-Bit
A/D Converter with On-Chip 16 Channel Multiplexer
Literature Number: SNOA596
MD A
Data Acquisition Using the NApaptiolicnaatlioSnemNoictoen2d5u8ctor ultata N-25
ADC0816 and ADC0817 LarryWakeman ipA 8
January1981 l
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8-Bit A/D Converter with
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I.Introduction TheADC0816isidenticaltotheADC0817exceptforaccu- U
TheADC0816andADC0817,CMOS16-ChannelDataAc- racy.TheADC0816isthemoreaccuratepart,havingatotal s
quisitiondevicesareselectablemulti-input8-bitA/Dconvert- unadjustederrorof±1⁄2LSB.TheADC0817hasatotalun- in
ers.Inadditiontoastandard8-bitsuccessiveapproximation adjustederror±1LSB.Inmanyapplicationswhereaslightly g
typeA/Dconverter,thesedevicescontaina16channelana- loweraccuracyistolerable,theADC0817representsamore
log multiplexer with 4-bit latched address inputs. They in- economicalsolution. th
cludemuchofthecircuitryrequiredtobuildan8-bitaccu- e
rate,mediumthrough-putdataacquisitionsystem. II.FunctionalDescription A
ThesetwoconvertersaresimilartotheADC0808/ADC0809 TheADC0816/ADC0817canbesubdividedintotwomajor D
A/DconvertersexceptthattheADC0816/ADC0817have16 functionalblocks;amultiplexer/latchandanA/Dconverter, C
analoginputsinsteadof8,andthemultiplexeroutputand Figure1.Themultiplexer/latchiscomposedofa16channel 0
the A/D comparator input are externally available. (The multiplexer,a4bitchannelselectregister,andsomechan- 8
ADC0808/ADC0809connecttheseinternally.)Thisfeatureis nelselectdecodingcircuitry. 1
useful when connecting signal processing circuitry to the Thechannelselectaddressisloadedonthepositivetransi- 6
A/D.AlsotheADC0816/ADC0817haveanexpansioncon- tionoftheAddressLatchEnable(ALE)input. a
trolpintoallowadditionofmoremultiplexers,hencemorein- n
putchannels. d
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FIGURE1.ADC0816/ADC0817FunctionalBlockDiagram 1
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Figure2showsthisaddressingscheme.Amultiplexeren- composedofacomparator,256Rtyperesistorladder,suc-
ablepincalledExpansionControl(EC)isalsoprovided.Tak- cessiveapproximationregister(SAR),controllogic,andout-
ingthispinlowwilldisabletheonchipmultiplexer,allowing putdatalatch.
othermultiplexerstobeused,thusexpandingthenumberof UndernormaloperationthecontrollogicoftheA/Dwillfirst
inputs. detectapositivegoingpulseontheSTARTinput.Ontheris-
ingedgeofthispulsetheinternalregistersarecleared,and
willremainclearaslongasSTARTishigh.WhentheSTART
Address Expansion Selected
inputgoeslow,theconversionisinitiated.Thecontrollogic
D C B A Control Channel willcycletothebeginningofthenextapproximationcycleat
0 0 0 0 1 IN0 whichtimeEndofConversiongoeslowandtheconversion
0 0 0 1 1 IN1 isstarted.Duringaconversion,thecontrollogicwillselecta
tap on the resistor ladder, and route the signal through a
0 0 1 0 1 IN2
transistor switch tree to the input of the comparator. The
0 0 1 1 1 IN3 comparatorwilldecidewhetherthistapvoltageishigheror
0 1 0 0 1 IN4 lowerthantheinputsignalandindicatethistothecontrol
logic.Thecontrollogicthendecideswhichtapistobese-
0 1 0 1 1 IN5
lectednext.Meanwhile,theSARmaintainsarecordofthe
0 1 1 0 1 IN6 conversion’sprogress.Thisalgorithmtakes8clockperiods
0 1 1 1 1 IN7 perapproximationandrequires8approximationstoconvert
1 0 0 0 1 IN8 8 bits.Thus 64 clock periods are required for a complete
conversion.
1 0 0 1 1 IN9
OncetheentireconversioniscompletedthedataintheSAR
1 0 1 0 1 IN10 isloadedintotheoutputregister.ThisisaTRI-STATE®reg-
1 0 1 1 1 IN11 isterwhichrequiresthatitsoutputsbeenabledbyrisingthe
1 1 0 0 1 IN12 OutputEnable(OEorTRI-STATE)input.Thedatacanthen
bereadbythecontrollinglogic.Duringoperation,theEOC
1 1 0 1 1 IN13
outputmustbemonitoredtodeterminewhetherthedeviceis
1 1 1 0 1 IN14 activelyconvertingorisreadytooutputdata.Oncethechan-
1 1 1 1 1 IN15 neladdressisloaded,apositivegoingpulseonSTARTwill
starttheconversionandcauseEOCtofall.WhenEOCgoes
X X X X 0 NONE
highagainthedataisreadytoberead,which,aswasprevi-
FIGURE2.AnalogInputSelectionTable ouslystated,isaccomplishedbyraisingtheOEinput.The
datacanbereadanytimepriortooneclockperiodbefore
Theoutputofthemultiplexerusuallyfeedstheinputofthe the completion of the next conversion. The ADC0816/
secondmajorfunctionalblock,theA/Dconverter.Thiscon- ADC0817timingisshowninFigure3.(Seedatasheetfor
verterisasuccessiveapproximationtypeconverterthatis exactspecifications.)
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FIGURE3.ADC0816/ADC0817TimingDiagram
III.AnalogInputDesigns ducepowersupplynoise.Thesupplylinesshouldbewell
bypassedwithfiltercapacitorsanditisrecommendedthat
A.RatiometricConversion separate PC board traces be used to route the 5V and
Theexternalavailabilityofbothendsofthe256Rresistor groundtothereferenceinputsandtothesupplypins.
laddermakesthisconverterideallysuitedtousewithratio-
metrictransducers.Aratiometrictransducerisaconversion B.AbsoluteConversion
device whose output is proportional to some arbitrary full Absoluteconversionreferstotheuseoftransducerswhose
scalevalue.Inotherwords,theactualvalueofthetransduc- outputvalueisnotrelatedtosomeothervoltage.The“abso-
ersoutputisofnogreatimportance,buttheratioofthisout- lute”valueofthetransducer’soutputvoltageisveryimpor-
puttothefullscalereferenceisvaluable.Forexample,the tant.Thisimpliesthatthereferencemustbeveryaccurately
potentiometrictransducersofFigure4havethisfeature. knowntobeabletoaccuratelydeterminethevalueofthe
Theprimeadvantageofthesetransducersisthatanaccu- transducersoutput.Figure5showsatypicalgroundedrefer-
rate reference is not required. However, the reference enceconnectionusingtheLM336-5,5Vreference.Notethat
shouldbenoisefreebecausevoltagespikesduringacon- ratiometrictransducerscanalsobeusedinthisapplication
versioncouldcauseinaccurateresults. alongwithabsolutetransducers.
Perhapsthesimplestmethodtoobtainareferencewouldbe Inmostofthefollowingapplicationseitherabsoluteorratio-
touseavoltagealreadypresentinthesystem,thepower metrictransducerscanbeused.Theonlydifferencebeing
supply.AsshowninFigure4the5Vsupplycanbeeasily thatwhenabsolutetransducersareemployed,moreaccu-
connectedasthereference,butcaremustbetakentore- ratereferencesshouldbeused.
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FIGURE4.SimpleRatiometricConverterUsingPowerSupplyasReference
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FIGURE5.SimpleAbsoluteConverterUsingLM336-5.0Converter
C.ReferenceManipulation
Insomesmallsystems(particularlyCMOSsystems)where
areferenceisrequired,onecanusethereferenceasasup-
plyasshowninFigure6.InthiscasetheLM336-5isusedto
whereV =unregulatedsupplyvoltage;V =referencevolt-
generatethe5Vreferenceandalsothe5Vsupply.Anun- S REF
age; I =V /1 kW , resistor ladder current;
regulatedsupplygreaterthan5Visrequiredtoallowtheref- LAD REF
I =transducer currents; I =system power supply require-
erencetooperate.Theseriesresistor,R,ischosensuchthat TR p
ments;andI =minimumreferencecurrent.
the maximum current needed by the system is supplied R
whilekeepingtheLM336-5inregulation.Thevalueofthis Figure7showsasimplemethodofbufferingthereferences
resistorissimply: toprovidehighercurrentcapabilities.ThiseliminatestheIp
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termintheaboveequation.InFigure5,Figure6,andFigure LM10’swouldworkwell.R1,R2,andR3formaresistordi-
7,itisadvisabletoaddsomesupplybypasscapacitorstore- viderinwhichR1andR3centerthereferenceatV /2and
CC
ducenoise,typically0.1µF. R2canbevariedtoobtaintheproperreferencemagnitude.
D.ReferenceVoltageVariation E.AnalogChannelExpansion
Insomecasesitispossibletoeliminatetheneedforgainad- TheADC0816/ADC0817haveanexpansioncontrol(EC)pin
justmentsontheanaloginputsignalsbyvaryingtheRef(+) whichisactuallyamultiplexerenable.Whenthissignalis
andRef(−)voltagestoachievevariousfullscaleranges.The low,alltheswitchesareinhibitedsothatanothersignalcan
referencevoltagecanbevariedfrom5Vtoabout0.5volts beappliedtothecomparatorinput.Additionalchannelscan
withtheonerestrictionthat[V −V ]/2=(V -GND)/ beimplementedverysimply,asshowninFigure10.Thisde-
Ref(+) Ref(−) CC
2±0.1volts.Inotherwords,thecenterofthereferencevolt- signhasexpandedthenumberofchannelsfrom16to32.To
agemustbewithin±0.1Vofmid-supply.Thereasonforthis address the channels, 5 address lines are required. The
isthatthereferenceladderistapedbyannorp-channel lower4bitsaredirectlyappliedtotheA/D’sA,B,C,andDin-
MOSFETswitchtree.Offsettingthevoltageatthecenterof puts.All5bitsarealsoappliedtoanMM74C174Hex“D”
theswitchtreefromV /2willcausethetransistorstoincor- flip-flop which is used as an address latch for the two
CC
rectlyturnoff,resultingininaccurateanderraticconversions. CD4051’s.The1Q,2Q,and3QoutputsoftheMM74C174
However,ifproperlyapplied,thismethodcanreduceparts feedtheCD4051addressinputs4Qand5Qaregatedto
countsaswellaseliminateextrapowersuppliesfortheinput formenablesignalsforeachCD4051.5Qisalsoroutedto
buffers. theECinputtoproperlyenabletheA/D’smultiplexer.
Figure8showsasimplesupplycenteredreferencewhere TheCD4051sareusedwitha5Vsupply,sotheirspecifica-
R1andR2offsetRef(+)andRef(−)fromV andGround. tionsareverysimilartotheADC0816/ADC0817multiplexer.
CC
AnLM336,2.5Vreferenceisshownhere,butanyreference Thus, anything that can be done with the ADC0816/
between0.5Vand5Vcanbeused.Foroddreferencevalues ADC0817multiplexercanbedonewiththeCD4051’s.This
thesimpleopampschemeshowninFigure9canbeused. includesmakinguseofthepreviouslydiscussedinputde-
Single power supply op amps such as the LM324’s or signsaswellasothers.
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FIGURE6.ReferenceUsedasPowerSupply
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FIGURE7.BufferedReferenceUsedasPowerSupply
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FIGURE8.SupplyCenteredReferenceUsingLM3362.5VReference
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FIGURE9.SupplyCenteredReferenceUsingBufferedResistorDivider
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FIGURE10.Simple32-ChannelA/DConverter
F.DifferentialAnalogInputs tractthetworesults.Thismethodrequirestwosingleended
Aneasy,andsometimesoverlookedmethodforimplement- conversionstodoonedifferentialconversion,hencetheef-
ingadifferentialinputschemeisshowninFigure11.Thisap- fectivedifferentialconversiontimeistwicethatofasingle
proachactuallyimplementsthedifferentialinsoftware.All16 channeloralittleover200µS(Ck=640kHz).Thedifferential
channelsarepairedintopositiveandnegativeinputs.Then inputsshouldbestablethroughoutbothoftheconversions
the controlling logic or microprocessor will convert each toproduceaccurateresults.
channelofadifferentialpair,loadeachresult,andthensub-
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G.InputSignalBuffering
Therearethreebasicrangesofinputsignallevelsthatcan
occurwheninterfacingtheADC0816/ADC0817tothe“real
world”.Theseare:a)signalswhichexceedV and/orgo
CC
belowground;b)signalswhoseinputrangesarelessthan
V andGround,butaredifferentthanthereferencerange;
CC
c)andsignalsthathaveaninputrangethatisequaltothe
reference range. Each of these situations require different
buffering.
Thelastsituation,case“c”isusuallytrivial.Nobufferingis
requiredunlessthesourceimpedanceoftheinputsignalis
veryhigh.Ifthisisthecaseabuffermaybeaddedbetween
themultiplexeroutputandcomparatorinputpins.Ifahighin-
putimpedanceopampisused,theinputleakagelooking
fromthemultiplexerinputcanbegreatlyreduced.Thiscir-
cuitisshowninFigure13.Usingabufferlikethiseliminates
thenecessityforlargecapacitorsonthemultiplexerinputs
(explainedlater),butthesebuffersusuallyrequiretwosup-
pliesandcancontributetheirownconversionerrors.
Iftheinputsignaliswithinthesupply,butthereferencecan-
notbemanipulatedtoconformtothefullinputrange,the
unitygainbufferofFigure13canbereplacedbyanotherop
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ampasshownintheFigure13inset.Thistypeofamplifier
FIGURE11.Simple8-DifferentialChannelConverter
willprovidegainand/oroffsetcontroltocreateafullscale
rangeequaltothereference.
A16channeldifferentialsystemcanberealizedbymodify-
ing Figure 10. This is accomplished by changing the Thethirdcase,c,wheretheinputrangeexceedsVCCand/or
CD4051’saddressingandaddingadifferentialamplifierin goesbelowground,theinputsignalsmustbelevelshifted
betweenthemultiplexeroutputsandthecomparatorinput. beforetheycangotothemultiplexerwiththeonlyexception
TheselectlogicfortheCD4051’shasbeenmodifiedtoen- being when the magnitude of the input voltage range is
able the switches to be selected in parallel with the within5V,butoutsidethe0-5Vsupplyrange.Inthiscasethe
ADC0816/ADC0817.Theoutputsofthethreemultiplexers supplyfortheentirechipcouldbeshiftedtotheanaloginput
areconnectedtoadifferentialamplifier,composedof2in- range,andthedigitalsignalslevelshiftedtothesystem’s5V
vertingamplifierswithgainandoffsettrimmers.Adualop supply.
ampconfigurationofinvertingamplifierscanmoreeasilybe A typical example would be bipolar inputs from −2.5V to
trimmedandhaslessstringentfeedbackresistormatching +2.5.IftheADC0816/ADC0817havetheirsupplyandrefer-
requirements,ascomparedtoasingleopampdesign.The encederivedasshowninFigure14,thenthe ±2.5Vlogic
transferequationforthedualopampamplifiershowninFig- outputsneedonlytobelevelshiftedto0and5Vlogiclevels,
ure12is: Figure15.
H.DigitalDataAcquisition
TheADC0816/ADC0817makegoodanalogdataacquisition
subsystems,buttherearemanyinstanceswherethesecon-
Propagationdelaythroughtheopampsshouldbeconsid- vertersaregooddigitaldataacquisitionsystemsaswell.Ifa
eredtoprovidesufficienttimebetweentheanalogswitchse- system has unused channels, digital inputs can be con-
lectionandstartconversiontoallowtheanalogsignalatthe nectedtothesechannelsinsteadofbeingseparatelybuff-
comparatorinputtosettle.UsingtheLF353opamp,thisde- eredintothesystem.Inthecaseofamicroprocessorsystem
layshouldbeabout5µs. this could eliminate an I/O port and associated logic.The
speed at which this input is accessed is one conversion
cycle,butmanytimesthiswillbefastenough.Theseinputs
canbeusedasinputswitches,powersupplyindicatorde-
vices,orothersystemstatusflags.Themicroprocessorcon-
vertsthedigitalinputchannelandreadsit.Softwarethende-
cides whether the input is high enough or low enough to
causeaparticularaction.
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