Computer Arithmetic, Part 5 - Electrical and Computer Engineering

93 Pages·2015·1.21 MB·English

by  Behrooz Parhami

Part V
Real Arithmetic
Parts Chapters
1 . Numbers and Arithmetic
2 . Representing Signed Numbers
I . Number Representation
3 . Redundant Number Systems
4 . Residue Number Systems
5 . Basic Addition and Counting
6 . Carry-Lookahead Adders
s I I . Addition / Subtraction
n 7 . Variations in Fast Adders
o
ti 8 . Multioperand Addition
a
r
e 9 . Basic Multiplication Schemes
p
O 1 0 . High-Radix Multipliers
y I I I. Multiplication 1 1 . Tree and Array Multipliers
r
a 1 2 . Variations in Multipliers
nt
e
m 1 3 . Basic Division Schemes
e 1 4 . High-Radix Dividers
El I V . Division 1 5 . Variations in Dividers
1 6 . Division by Convergence
1 7 . Floating-Point Reperesentations
1 8 . Floating-Point Operations
V . Real Arithmetic
1 9 . Errors and Error Control
2 0 . Precise and Certifiable Arithmetic
2 1 . Square-Rooting Methods
2 2 . The CORDIC Algorithms
V I . Function Evaluation
2 3 . Variations in Function Evaluation
2 4 . Arithmetic by Table Lookup
2 5 . High-Throughput Arithmetic
2 6 . Low-Power Arithmetic
V I I . Implementation Topics
2 7 . Fault-Tolerant Arithmetic
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Appendix: Past, Present, and Future
May 2015 Computer Arithmetic, Real Arithmetic Slide 1
About This Presentation
This presentation is intended to support the use of the textbook
Computer Arithmetic: Algorithms and Hardware Designs (Oxford
U. Press, 2nd ed., 2010, ISBN 978-0-19-532848-6). It is updated
regularly by the author as part of his teaching of the graduate
course ECE 252B, Computer Arithmetic, at the University of
California, Santa Barbara. Instructors can use these slides freely
in classroom teaching and for other educational purposes.
Unauthorized uses are strictly prohibited. © Behrooz Parhami
Edition Released Revised Revised Revised Revised
First Jan. 2000 Sep. 2001 Sep. 2003 Oct. 2005 May 2007
May 2008 May 2009
Second May 2010 Apr. 2011 May 2012 May 2015
May 2015 Computer Arithmetic, Real Arithmetic Slide 2
V Real Arithmetic
Review floating-point numbers, arithmetic, and errors:
• How to combine wide range with high precision
• Format and arithmetic ops; the IEEE standard
• Causes and consequence of computation errors
• When can we trust computation results?
Topics in This Part
Chapter 17 Floating-Point Representations
Chapter 18 Floating-Point Operations
Chapter 19 Errors and Error Control
Chapter 20 Precise and Certifiable Arithmetic
May 2015 Computer Arithmetic, Real Arithmetic Slide 3
“According to my calculation,
“It’s an inexact science.”
you should float now ... I think ...”
May 2015 Computer Arithmetic, Real Arithmetic Slide 4
17 Floating-Point Representations
Chapter Goals
Study a representation method offering both
wide range (e.g., astronomical distances)
and high precision (e.g., atomic distances)
Chapter Highlights
Floating-point formats and related tradeoffs
The need for a floating-point standard
Finiteness of precision and range
Fixed-point and logarithmic representations
as special cases at the two extremes
May 2015 Computer Arithmetic, Real Arithmetic Slide 5
Floating-Point Representations: Topics
Topics in This Chapter
17.1 Floating-Point Numbers
17.2 The IEEE Floating-Point Standard
17.3 Basic Floating-Point Algorithms
17.4 Conversions and Exceptions
17.5 Rounding Schemes
17.6 Logarithmic Number Systems
May 2015 Computer Arithmetic, Real Arithmetic Slide 6
17.1 Floating-Point Numbers
No finite number system can represent all real numbers
Various systems can be used for a subset of real numbers
Fixed-point w.f Low precision and/or range
Rational p/q Difficult arithmetic
Floating-point sbe Most common scheme
Logarithmic log x Limiting case of floating-point
b
Fixed-point numbers
Square of
x = (0000 0000.0000 1001) Small number
two neither number
y = (1001 0000.0000 0000) Large number
two representable
Floating-point numbers
x = 1.001  2–5
x =  s  be or  significand  baseexponent
y = 1.001  2+7
A floating-point number comes with two signs:
Number sign, usually appears as a separate bit
Exponent sign, usually embedded in the biased exponent
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Floating-Point Number Format and Distribution
Fig. 17.1 Typical ± e s
floating-point
Sign E x p o n e n t : S i g n i f i c a n d :
number format.
Signed integer, Represented as a fixed-point number
0 : + often represented
1 : – as unsigned value Usually normalized by shifting,
by adding a bias so that the MSB becomes nonzero.
Fig. 17.2 Subranges
In radix 2, the fixed leading 1 1.001  2–5
and special values in
Range with h bits: can be removed to save one bit;
floating-point number [–bias, 2 h –1–bias] this bit is known as "hidden 1". 1.001  2+7
representations.
Negative numbers Positive numbers
– max – FLP – min – 0 min + FLP + max + +

Sparser Denser Denser Sparser
Overflow Underflow Overflow
region regions region
Midway Underflow Typical Overflow
example example example example
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Floating-Point Before the IEEE Standard
Computer manufacturers tended to have their own hardware-level formats
This created many problems, as floating-point computations could produce
vastly different results (not just differing in the last few significant bits)
To get a sense for the wide variations in floating-point formats, visit:
http://www.mrob.com/pub/math/floatformats.html
In computer arithmetic, we talked about IBM, CDC, DEC, Cray, … formats
and discussed their relative merits
First IEEE standard for binary floating-point arithmetic was adopted in 1985
after years of discussion
The 1985 standard was continuously discussed, criticized, and clarified for
a couple of decades
In 2008, after several years of discussion, a revised standard was issued
May 2015 Computer Arithmetic, Real Arithmetic Slide 9
17.2 The IEEE Floating-Point Standard
IEEE 754-2008 Standard
Short (32-bit) format
(supersedes IEEE 754-1985)

Also includes half- &
8 bits, 23 bits for fractional part
bias = 127, (plus hidden 1 in integer part) quad-word binary, plus
–126 to 127 some decimal formats
Sign Exponent Significand
11 bits,
bias = 1023, 52 bits for fractional part
–1022 to 1023 (plus hidden 1 in integer part)
Long (64-bit) format
Fig. 17.3 The IEEE standard floating-point
number representation formats.
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