components :: motorola :: 68000 :: MC68331 Users Manual 1991

360 Pages·1991·19.7 MB·English

MC68331 UMI AD
M68300 Family
USER'S
MANUAL
®
MOTOROLA
Device Overview
Signal Descriptions
System Integration Module (SIM)
CPU32 Overview
Queued Serial Module (QSM)
General-Purpose Timer (GPT) OI verview
Emulation Overview
Electrical Characteristics
Ordering Information and Mechanical Data
MC68331 Memory Map
Programming Model and Instruction Summary
System Integration Module (SIM) - Memory Map and Registers
Queued Serial Module (QSM) - Memory Map and Registers •
General Purpose Timer (GPT) - Memory Map and Registers . .
Index
Device Overview
. . Signal Descriptions
• System Integration Module (SIM)
. . CPU32 Overview
• Queued Serial Module (QSM)
. . General-Purpose Timer (GPT) Overview
• Emulation Overview
. . Electrical Characteristics
• Ordering Information and Mechanical Data
. . MC68331 Memory Map
• Programming Model and Instruction Summary
• System Integration Module (SIM) - Memory Map and Registers
. . Queued Serial Module (QSM) - Memory Map and Registers
• General Purpose Timer (GPT) - Memory Map and Registers
• Index
MC68331
USER'S MANUAL
Motorola reserves the right to make changes without further notice to any products herein to improve reliability,
function or design. Motorola does not assume any liability arising out of the application or use of any product or
circuit described herein; neither does it convey any license under its patent rights nor the rights of others. Motorola
products are not designed, intended, or authorized for use as components in systems intended for surgical implant
into the body, or other applications intended to support or sustain life, or for any other application in which the
failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer
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Motorola was negligent regarding the design or manufacture of the part. Motorola and (f.i0 are registered
trademarks of Motorola, Inc. Motorola, Inc. is an Equal Employment Opportunity! Affirmative Action Employer.
© MOTOROLA INC., 1991

PREFACE
The MC68331 microcontroller unit (MCU) is an integral module of Motorola's
M68300 Family of 32-bit MCUs. The MC68331 User's Manual describes the
capabilities, operation, and functions of the MC68331 MCU.
This user's manual is organized as follows:
Section 1 Device Overview
Section 2 Signal Descriptions
Section 3 System Integration Module (SIM)
Section 4 CPU32 Overview
Section 5 Queued Serial Module (QSM)
Section 6 General Purpose Timer (GPT) Overview
Section 7 Emulation Overview
Section 8 Electrical Characteristics
Section 9 Ordering Information and Mechanical Data
Appendices
Index
For additional information pertaining to the CPU32 processor used in the
MC68331, refer to the CPU32 Central Processor Unit Reference Manual,
Motorola document number CPU32RM/AD. For information pertaining to the
timer system used in the MC68331, refer to the GPT General Purpose Timer
Reference Manual, Motorola document number GPTRM/AD.
MC68331 USER'S MANUAL MOTOROLA
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TABLE OF CONTENTS
Paragraph Title Page
Number Number
SECTION 1
DEVICE OVERVIEW
1.1 Central Processor Unit ............................................................................ 1-2
1.2 Peripheral Modules ................................................................................. 1-2
1.2.1 General-Purpose Timer (GPT) ........................................................ 1-2
1.2.2 Queued Serial Module (QSM) ......................................................... 1-4
1.2.3 System Integration Module (SIM) ................................................... 1-4
1.2.4 External Bus Interface (EBI) ........................................................... 1-5
1.2.4.1 Chip-Selects ........................................................................... 1-5
1.2.4.2 System Protection Submodule ................................................ 1-5
1.2.4.3 Test Submodule ...................................................................... 1-5
1.2.4.4 System Clock .......................................................................... 1-5
1.3 Module Memory Map .............................................................................. 1-6
SECTION 2
SIGNAL DESCRIPTIONS
2.1 Signal Index ............................................................................................ 2-1
2.2 Address Bus (A23-AO) ........................................................................... 2-1
2.3 Data Bus (015-00) ................................................................................. 2-1
2.4 Function Codes (FC2-FCO) .................................................................... 2-4
2.5 Chip-Selects (CS1 O-CSO, CSBOOT) ..................................................... 2-4
2.6 Bus Control Signals ................................................................................. 2-4
2.6.1 Data and Size Acknowledge (OSACK1, OSACKO) ......................... 2-5
2.6.2 Autovector (AVEC) ............ .:..:..:..:..: ...................................................... 2-5
2.6.3 Read-Modify-Write Cycle (RMC) .................................................... 2-5
2.6.4 Address Strobe (AS) ....................................................................... 2-5
2.6.5 Data Strobe (OS) ............................................................................ 2-5
2.6.6 Transfer Size (S120, S121) .............................................................. 2-5
2.6.7 Read/Write (R/W) ............................................................................ 2-5
2.7 Bus Arbitration Signals ............................................................................ 2-6
2.7.1 Bus Request (BR) ........................................................................... 2-6
2.7.2 Bus Grant (BG) ............................................................................... 2-6
MC68331 USER'S MANUAL TABLE OF CONTENTS MOTOROLA
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TABLE OF CONTENTS
(Continued)
Paragraph Title Page
Number Number
2.7.3 Bus Grant Acknowledge (BGACK) ................................................. 2-6
2.8 Interrupt Request Level (IRQ7-IRQ1) .................................................... 2-6
2.9 Exception Control Signals ....................................................................... 2-6
2.9.1 Reset (RESET) ............................................................................... 2-6
2.9.2 Halt (HALT) ..................................................................................... 2-6
2.9.3 Bus Error (BERR) ........................................................................... 2-7
2.10 Clock Signals .......................................................................................... 2-7
2.10.1 System Clock (CLKOUT) ................................................................ 2-7
2.10.2 Crystal Oscillator (EXTAL, XTAL) ................................................... 2-7
2.10.3 External Filter Capacitor (XFC) ....................................................... 2-7
2.10.4 Clock Mode Select (MOOCK) ......................................................... 2-7
2.11 Instrumentation and Test Signals ............................................................ 2-7
2.11.1 Instruction Fetch (IFETCH) ............................................................. 2-7
2.11.2 Instruction Pipe ((PIPE) .................................................................. 2-7
2.11.3 Breakpoint (BKPT) .......................................................................... 2-8
2.11.4 Freeze (FREEZE) ........................................................................... 2-8
2.11.5 Quotient Out (QUOT) ...................................................................... 2-8
2.11.6 Test Mode Enable (TSTME) ........................................................... 2-8
2.11.7 Three-State Control (TSC) .............................................................. 2-8
2.11.8 Development Serial In, Out, Clock (OSI, OSO, OSCLK) ................. 2-8
2.12 General-Purpose Timer (GPT) Signals ................................................... 2-8
2.12.1 Input Capture 1-3 (IC1-IC3) ........................................................... 2-8
2.12.2 Input Capture 4/0utput Compare 5 (IC4/0C5) ............................... 2-9
2.12.3 Output Compare 1-4 (OC1-OC4) .................................................. 2-9
2.12.4 Pulse-Width Modulation A-B (PWMA-PWMB) .............................. 2-9
2.12.5 Pulse Accumulator Input (PAl) ........................................................ 2-9
2.12.6 Auxiliary Input (PCLK) ..................................................................... 2-9
2.13 Queued Serial Module Signals ............................................................... 2-9
2.13.1 SCI Receive Data (RXO) ................................................................ 2-9
2.13.2 SCI Transmit Data (TXO) ................................................................ 2-9
2.13.3 Peripheral Chip-Selects (PCS3-PCSO) ........................................ 2-10
2.13.4 Slave Select (SS) .......................................................................... 2-10
2.13.5 QSPI Serial Clock (SCK) .............................................................. 2-10
2.13.6 Master In Slave Out (MISO) .......................................................... 2-10
2.13.7 Master Out Slave In (MOSI) .......................................................... 2-10
2.14 Synthesizer Power (VOOSYN) .............................................................. 2-10
2.15 System Power and Ground (VOOE and VSSE) .................................... 2-10
2.16 System Power and Ground (VOOI and VSSI) ....................................... 2-10
MOTOROLA TABLE OF CONTENTS MC68331 USER'S MANUAL
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TABLE OF CONTENTS
(Continued)
Paragraph Title Page
Number Number
SECTION 3
SYSTEM INTEGRATION MODULE (SIM)
3.1 System Configuration and Protection ...................................................... 3-4
3.1.1 Module Configuration Register (MCR) ............................................ 3-6
3.1.2 System Integration Module Test Registers ..................................... 3-7
3.1.2.1 System Integration Module Test Register. .............................. 3-7
3.1.2.2 System Integration Module Test Register (E Clock) ............... 3-9
3.1.3 Reset Status Register (RSR) .......................................................... 3-9
3.1.4 System Protection Control Register (SYPCR) .............................. 3-10
3.1.5 Bus Monitors ................................................................................. 3-13
3.1.5.1 Internal Bus Monitor .............................................................. 3-13
3.1.5.2 Halt Monitor .......................................................................... 3-13
3.1.5.3 Spurious Interrupt Monitor .................................................... 3-13
3.1.6 Software Watchdog ...................................................................... 3-13
3.1.7 Periodic Interrupt Timer (PITR) ..................................................... 3-15
3.1.7.1 Periodic Interrupt Control Register (PICR) ............................ 3-16
3.1.7.2 Periodic Timer Period Calculation ........................................ 3-17
3.1.7.3 Using The Periodic Timer as a Real-Time Clock .................. 3-19
3.1.8 Low Power STOP Operation (LPSTOP) ....................................... 3-19
3.1.9 Freeze Operation .......................................................................... 3-20
3.2 Clock Synthesizer ................................................................................. 3-20
3.2.1 Clock Synthesizer Control Register .............................................. 3-21
3.2.2 Phase Comparator and Filter ........................................................ 3-23
3.2.3 Frequency Divider ......................................................................... 3-23
3.2.4 Clock Control ................................................................................ 3-25
3.3 Chip-Select ........................................................................................... 3-26
3.3.1 Chip-Select Operation ................................................................... 3-28
3.3.2 Pin Assignment Registers ............................................................. 3-33
3.3.3 Base Address Registers ............................................................... 3-35
3.3.4 Option Registers (CSORBT, CSORO-CSOR10) .......................... 3-36
3.3.5 Chip-Select Pin Data Register (CSPDR) ...................................... 3-41
3.3.6 Reset Mode .................................................................................. 3-41
3.3.6.1 Pin Assignment Registers ..................................................... 3-42
3.3.6.2 Base and Option Registers ................................................... 3-43
3.4 External Bus Interface ........................................................................... 3-44
3.4.1 Port E Pin Assignment Register (PEPAR) .................................... 3-44
3.4.2 Port E Data Direction Register (DDRE) ........................................ 3-45
MC68331 USER'S MANUAL TABLE OF CONTENTS MOTOROLA
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