Communicating Process Architectures 2007: WoTUG-30

528 Pages·2007·6.34 MB·English

by  A. A. Mcewan

COMMUNICATING PROCESS ARCHITECTURES 2007
Concurrent Systems Engineering Series
Series Editors: M.R. Jane, J. Hulskamp, P.H. Welch, D. Stiles and T.L. Kunii
Volume 65
Previously published in this series:
Volume 64, Communicating Process Architectures 2006 (WoTUG-29), P.H. Welch, J. Kerridge
and F.R.M. Barnes
Volume 63, Communicating Process Architectures 2005 (WoTUG-28), J.F. Broenink,
H.W. Roebbers, J.P.E. Sunter, P.H. Welch and D.C. Wood
Volume 62, Communicating Process Architectures 2004 (WoTUG-27), I.R. East, J. Martin,
P.H. Welch, D. Duce and M. Green
Volume 61, Communicating Process Architectures 2003 (WoTUG-26), J.F. Broenink and
G.H. Hilderink
Volume 60, Communicating Process Architectures 2002 (WoTUG-25), J.S. Pascoe, P.H. Welch,
R.J. Loader and V.S. Sunderam
Volume 59, Communicating Process Architectures 2001 (WoTUG-24), A. Chalmers, M. Mirmehdi
and H. Muller
Volume 58, Communicating Process Architectures 2000 (WoTUG-23), P.H. Welch and
A.W.P. Bakkers
Volume 57, Architectures, Languages and Techniques for Concurrent Systems (WoTUG-22),
B.M. Cook
Volumes 54–56, Computational Intelligence for Modelling, Control & Automation,
M. Mohammadian
Volume 53, Advances in Computer and Information Sciences ’98, U. Güdükbay, T. Dayar,
A. Gürsoy and E. Gelenbe
Volume 52, Architectures, Languages and Patterns for Parallel and Distributed Applications
(WoTUG-21), P.H. Welch and A.W.P. Bakkers
Volume 51, The Network Designer’s Handbook, A.M. Jones, N.J. Davies, M.A. Firth and
C.J. Wright
Volume 50, Parallel Programming and JAVA (WoTUG-20), A. Bakkers
Volume 49, Correct Models of Parallel Computing, S. Noguchi and M. Ota
Volume 48, Abstract Machine Models for Parallel and Distributed Computing, M. Kara, J.R. Davy,
D. Goodeve and J. Nash
Volume 47, Parallel Processing Developments (WoTUG-19), B. O’Neill
Volume 46, Transputer Applications and Systems ’95, B.M. Cook, M.R. Jane, P. Nixon and
P.H. Welch
Transputer and OCCAM Engineering Series
Volume 45, Parallel Programming and Applications, P. Fritzson and L. Finmo
Volume 44, Transputer and Occam Developments (WoTUG-18), P. Nixon
ISSN 1383-7575
Communicating Process
Architectures 2007
WoTUG-30
Edited by
Alistair A. McEwan
University of Surrey, Guildford, United Kingdom
Steve Schneider
University of Surrey, Guildford, United Kingdom
Wilson Ifill
Atomic Weapons Establishment Aldermaston, Reading, Berks, United Kingdom
and
Peter Welch
University of Kent, Canterbury, United Kingdom
Proceedings of the 30th WoTUG Technical Meeting,
8–11 July 2007, University of Surrey,
Guildford, United Kingdom
Amsterdam • Berlin • Oxford • Tokyo • Washington, DC
© 2007 The authors and IOS Press.
All rights reserved. No part of this book may be reproduced, stored in a retrieval system,
or transmitted, in any form or by any means, without prior written permission from the publisher.
ISBN 978-1-58603-767-3
Library of Congress Control Number: 2007929667
Publisher
IOS Press
Nieuwe Hemweg 6B
1013 BG Amsterdam
Netherlands
fax: [phone]
e-mail:
Comunicating Proces Architectures 207 v
Alistair McEwan, Steve Schneider, Wilson Ifill and Peter Welch (Eds.)
IOS Press, 2007
© 2007 The authors and IOS Press. All rights reserved.
Preface
The University of Surrey is delighted to host the Communicating Process Architectures
2007 conference. There are many reasons why this University, and Guildford in particular,
is appropriate for a conference about Computer Science and models of Concurrency. Not
least is the connection with one of the most famous Computer Scientists of them all: Alan
Turing, who grew up only a short distance from the site of the University. A statue of him
erected in the main plaza overlooks the conference venue, serving as an inspiration and
reminder to the strong theoretical and mathematical basis of the topic of this conference.
Delegates may also have paused for enlightenment at the village of Occam (now spelt
Ockham), famously the birthplace of William of Occam, as they approached Guildford.
th
This is the 30 meeting of this conference series. The first was a single day workshop,
organised by Inmos, and took place in Bristol in 1985. With the success of the Transputer,
the meeting grew into an international conference series, with the proceedings formally
published by IOS press since March 1988. The fact that the conference series is growing in
strength as technology evolves shows that its founding ideas still push the boundaries of
Computer Science and are as relevant as ever.
Since inception, the CPA conference series has always had strong interest from
industry, and this year is no exception with the conference being co-sponsored by AWE
UK. This year, there is a particular emphasis on hardware/software co-design, and the
understanding of concurrency that results from these systems. A range of papers on this
topic have been included, from the formal modeling of buses in co-design systems through
to software simulation and development environments.
Industrial relevance is further reflected in the achievements of this year’s invited
speakers. Professor Sir Tony Hoare, FRS, is the founding father of the theoretical basis
upon which much of the work in this series is based. The organisers are delighted that he
has accepted the invitation to address the conference on his new thoughts on fine-grained
concurrency. Professor David May, FRS, has been one of the leading lights of this, and
other, communities for many years. He was chief architect for the Transputer and the
occam programming language. The organisers are also delighted that he has accepted the
invitation to address the conference on his latest work on communicating process
architecture for massively multicore processors and how to program them.
We hope you will find the meeting exciting, invigorating, and motivating. We trust
you will find the published proceedings informative and inspirational – and the informal
Fringe presentations fun and thought provoking. This year, we have published abstracts of
several fringe presentations that were offered in advance of the conference.
Finally, the editors would like to thank the Programme Committee, friends of the
conference, and reviewers, for all their diligent hard work in reviewing papers, the staff of
the University of Surrey – especially Sophie Gautier-O’Shea – for their assistance in
organizing the event, and the Systems Assurance Group at the AWE for all their support.
Alistair McEwan (University of Surrey)
Steve Schneider (University of Surrey)
Peter Welch (University of Kent)
Wilson Ifill (AWE UK)
vi

Programme Committee
Dr Alistair McEwan, University of Surrey, UK (Chair)
Prof Steve Schneider, University of Surrey, UK
Prof Peter Welch, University of Kent, UK
Mr Wilson Ifill, AWE UK
Dr Alastair Allen, Aberdeen University, UK
Dr Fred Barnes, University of Kent, UK
Dr John Bjorndalen, University of Tromso, Norway
Dr Jan Broenink, University of Twente, The Netherlands
Dr Barry Cook, 4Links Ltd., UK
Dr Ian East, Oxford Brookes University, UK
Mr Marcel Groothuis, University of Twente, The Netherlands
Dr Gerald Hilderink, Eindhoven, The Netherlands
Prof Jon Kerridge, Napier University, UK
Dr Adrian Lawrence, Loughborough University, UK
Dr Jeremy Martin, GSK Ltd., UK
Dr Denis Nicole, University of Southampton, UK
Dr Jan Pedersen, University of Nevada, Las Vegas
Ir Herman Roebbers, Philips TASS, The Netherlands
Dr Marc Smith, Vassar College, New York, USA
Prof Dyke Stiles, Utah State University, USA
Dr Johan Sunter, Philips Semiconductors, The Netherlands
Mr Oyvind Teig, Autronica Fire and Security, Norway
Dr Brian Vinter, University of Southern Denmark, Denmark
Prof Alan Wagner, University of British Columbia, Canada
Mr David Wood, University of Kent, UK
vii
Additional Reviewers
Dr Andrew Butterfield, Trinity College Dublin, Ireland
Dr Bill Gardner, University of Guelph, Canada
Dr Michael Goldsmith, Formal Systems (Europe) Ltd., Oxford, UK
Prof Jim Woodcock, University of York, UK
Dr Mike Poppleton, University of Southampton, UK
Prof David May, Bristol University, UK
Dr Neil Evans, AWE UK
Mr Bojan Orlic, University of Twente, Netherlands
Dr Richard Paige, University of York, UK
Prof Ian Marshall, University of Lancaster, UK
Dr Dominique Cansell, Loria, France
Dr Steve Dunne, University of Teeside, UK
Mr Adam Sampson, University of Kent, UK
Mr Kevin Chalmers, Napier University, UK
Dr Leonardo de Freitas, University of York, UK
Dr Soritis Moschoyiannis, Univeristy of Surrey, UK
Mr Damien Karkinsky, University of Surrey, UK
Dr Mike Shields, Malta
Mr Charles Crichton, University of Oxford, UK
Prof Susan Stepney, University of York, UK
Dr Jon Saul, SystemCrafter, UK
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Contents
Preface v
Alistair McEwan, Steve Schneider, Peter Welch and Wilson Ifill
Programme Committee vi
Additional Reviewers vii
Part A. Invited Speakers
Fine-Grain Concurrency 1
Tony Hoare
Communicating Process Architecture for Multicores 21
David May
Part B. Languages, Tools, Models, Platforms and Patterns
Lazy Exploration and Checking of CSP Models with CSPsim 33
Phillip J. Brooke and Richard F. Paige
The Core Language of Aldwych 51
Matthew Huntbach
JCSProB: Implementing Integrated Formal Specifications in Concurrent Java 67
Letu Yang and Michael R. Poppleton
Components with Symbolic Transition Systems: A Java Implementation of
Rendezvous 89
Fabricio Fernandes, Robin Passama and Jean-Claude Royer
Concurrent/Reactive System Design with Honeysuckle 109
Ian East
CSP and Real-Time: Reality or Illusion? 119
Bojan Orlic and Jan F. Broenink
Testing and Sampling Parallel Systems 149
Jon Kerridge
Mobility in JCSP: New Mobile Channel and Mobile Process Models 163
Kevin Chalmers, Jon Kerridge and Imed Romdhani
C++CSP2: A Many-to-Many Threading Model for Multicore Architectures 183
Neil Brown
Design Principles of the SystemCSP Software Framework 207
Bojan Orlic and Jan F. Broenink
PyCSP – Communicating Sequential Processes for Python 229
John Markus Bjørndalen, Brian Vinter and Otto Anshus
x
A Process-Oriented Architecture for Complex System Modelling 249
Carl G. Ritson and Peter H. Welch
Concurrency Control and Recovery Management for Open e-Business
Transactions 267
Amir R. Razavi, Sotiris K. Moschoyiannis and Paul J. Krause
trancell – An Experimental ETC to Cell BE Translator 287
Ulrik Schou Jørgensen and Espen Suenson
A Versatile Hardware-Software Platform for In-Situ Monitoring Systems 299
Bernhard H.C. Sputh, Oliver Faust and Alastair R. Allen
High Cohesion and Low Coupling: The Office Mapping Factor 313
Øyvind Teig
A Process Oriented Approach to USB Driver Development 323
Carl G. Ritson and Frederick R.M. Barnes
A Native Transterpreter for the LEGO Mindstorms RCX 339
Jonathan Simpson, Christian L. Jacobsen and Matthew C. Jadud
Integrating and Extending JCSP 349
Peter Welch, Neil Brown, James Moores, Kevin Chalmers and
Bernhard Sputh
Part C. Hardware/Software Co-Design
Hardware/Software Synthesis and Verification Using Esterel 371
Satnam Singh
Modeling and Analysis of the AMBA Bus Using CSP and B 379
Alistair A. McEwan and Steve Schneider
A Step Towards Refining and Translating B Control Annotations to Handel-C 399
Wilson Ifill and Steve Schneider
Towards the Formal Verification of a Java Processor in Event-B 425
Neil Grant and Neil Evans
Advanced System Simulation, Emulation and Test (ASSET) 443
Gregory L. Wickstrom
Development of a Family of Multi-Core Devices Using Hierarchical
Abstraction 465
Andrew Duller, Alan Gray, Daniel Towner, Jamie Iles,
Gajinder Panesar and Will Robbins
Domain Specific Transformations for Hardware Ray Tracing 479
Tim Todman and Wayne Luk
A Reconfigurable System-on-Chip Architecture for Pico-Satellite Missions 493
Tanya Vladimirova and Xiaofeng Wu