CMOS Integrated Capacitive DC-DC Converters

218 Pages·2013·5.371 MB·English

by  Tom Van Breussegem, Michiel Steyaert (auth.)

Analog Circuits and Signal Processing
Series Editors
Mohammed Ismail
Mohamad Sawan
For furthervolumes:
http://www.springer.com/series/7381
Tom Van Breussegem
•
Michiel Steyaert
CMOS Integrated Capacitive
DC–DC Converters
123
TomVan Breussegem Michiel Steyaert
K.U.Leuven ESAT-MICAS Department of Elektrotechniek
Kasteelpark Arenberg 10bus 2443 K.U.Leuven
3001 Kardinaal Mercierlaan 94
Leuven 3001
Belgium Heverlee
Belgium
ISBN 978-1-4614-4279-0 ISBN 978-1-4614-4280-6 (eBook)
DOI 10.1007/978-1-4614-4280-6
SpringerNewYorkHeidelbergDordrechtLondon
LibraryofCongressControlNumber:2012940719
(cid:2)SpringerScience+BusinessMediaNewYork2013
Thisworkissubjecttocopyright.AllrightsarereservedbythePublisher,whetherthewholeorpartof
the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations,
recitation,broadcasting,reproductiononmicrofilmsorinanyotherphysicalway,andtransmissionor
informationstorageandretrieval,electronicadaptation,computersoftware,orbysimilarordissimilar
methodology now known or hereafter developed. Exempted from this legal reservation are brief
excerpts in connection with reviews or scholarly analysis or material supplied specifically for the
purposeofbeingenteredandexecutedonacomputersystem,forexclusiveusebythepurchaserofthe
work. Duplication of this publication or parts thereof is permitted only under the provisions of
theCopyrightLawofthePublisher’slocation,initscurrentversion,andpermissionforusemustalways
beobtainedfromSpringer.PermissionsforusemaybeobtainedthroughRightsLinkattheCopyright
ClearanceCenter.ViolationsareliabletoprosecutionundertherespectiveCopyrightLaw.
The use of general descriptive names, registered names, trademarks, service marks, etc. in this
publicationdoesnotimply,evenintheabsenceofaspecificstatement,thatsuchnamesareexempt
fromtherelevantprotectivelawsandregulationsandthereforefreeforgeneraluse.
While the advice and information in this book are believed to be true and accurate at the date of
publication,neithertheauthorsnortheeditorsnorthepublishercanacceptanylegalresponsibilityfor
anyerrorsoromissionsthatmaybemade.Thepublishermakesnowarranty,expressorimplied,with
respecttothematerialcontainedherein.
Printedonacid-freepaper
SpringerispartofSpringerScience+BusinessMedia(www.springer.com)
Preface
Monolithic integration is the paramount trend in both consumer and industrial
electronics.Inonlyfivedecadescomputersturnedfromroom-fillingmachinesinto
devicesthatfitinthepalmofourhand.Butacomputerisonlyasingleexampleof
the large number of electronic devices that surround us in everyday life. The
monolithic integration of electronic circuits—i.e. radio-transceivers data-con-
verters complete digital signal-processing systems—has led to a tremendous
increase in portability of the state-of-the-art electronic appliances.
But a single building block remains difficult to be integrated in a monolithic
electronic system: the switched-mode DC–DC converter. The DC–DC converter
provides an interface between the power source—whether it is a battery, a high-
voltage DC bus or a loosely regulated supply—and the different voltage rails
required in an electronic system. In most cases the switched-mode DC–DC con-
verterisimplementedbymeansofaseparatechip,withdiscrete-typecomponents
or a monolithically integrated linear regulator is used instead. Each of these
solutionsleadstoeitherabulky,expensiveorlowpower-efficiencysolution.This
is unacceptable intimeswhere power savings andcost reduction is the governing
social paradigm.
Switched-modeDC–DCconvertersareroughlydividedintotwocategories:the
inductive type and the capacitive type. The first using both an inductor and a
capacitor to convert the input voltage into a regulated output voltage, the latter
using nothing but capacitors to achieve this. In theory inductive-type DC–DC
converters provide a lossless DC–DC conversion for a continuous input-output
voltage range. Capacitive DC–DC converters fail to meet this expectation. And
therefore inductive-type of DC–DC converters are the dominant type of DC–DC
conversionapparatusinbothcommercialandindustrialprototypes.Foralongtime
inductive-typeDC–DCconverterswerethoughttomaintaintheirsuperiorityeven
for monolithically integrated prototypes. But in an integrated case the inductive
converters are cut short by the poor quality of the integrated inductors, the key-
components in the design. Therefore the intuitive preference for inductive con-
verters does not hold anymore. Moreover, integrated capacitors—crucial for the
operation of the capacitive converters—are native devices in CMOS technology
v
vi Preface
andcanbeconstructedathighquality.Therefore,despitetheirobviouslimitations,
capacitiveDC–DCconvertersareviablealternativesfortheinductivecounterparts.
ButtheadoptionofmonolithiccapacitiveDC–DCconvertersrequiresanextensive
analysis of the conversion characteristics. This book describes the background
requiredfordesigningafullyintegratedDC–DCconverterinCMOSandprovidesa
detailed discussionof anumber of CMOS prototypes.
Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 System-on-Chip Power Management . . . . . . . . . . . . . . . . . . . . 3
1.1.1 Power Density . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1.2 Voltage Gap. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.1.3 Energy Gap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.2 Power-Management Techniques . . . . . . . . . . . . . . . . . . . . . . . 7
1.2.1 Power Consumption in CMOS . . . . . . . . . . . . . . . . . . . 7
1.2.2 Clock Gating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.2.3 Voltage and Frequency Scaling. . . . . . . . . . . . . . . . . . . 10
1.2.4 Adaptive Voltage Body Biasing . . . . . . . . . . . . . . . . . . 12
1.2.5 Analysis. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
1.3 DC–DC Voltage Conversion. . . . . . . . . . . . . . . . . . . . . . . . . . 14
1.3.1 Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
1.3.2 Requirements and Characteristics . . . . . . . . . . . . . . . . . 15
1.3.3 Linear Series Conversion. . . . . . . . . . . . . . . . . . . . . . . 20
1.3.4 Capacitive Conversion. . . . . . . . . . . . . . . . . . . . . . . . . 21
1.3.5 Inductive Conversion. . . . . . . . . . . . . . . . . . . . . . . . . . 25
1.3.6 Analysis. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
1.4 State-of-the-Art Integrated Converters . . . . . . . . . . . . . . . . . . . 28
1.4.1 Inductive Converters. . . . . . . . . . . . . . . . . . . . . . . . . . 28
1.4.2 Capacitive Converters . . . . . . . . . . . . . . . . . . . . . . . . . 31
1.4.3 Figures of Merit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
1.4.4 Analysis. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
1.5 Summary and Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
1.6 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2 Converter Topologies and Fundamentals . . . . . . . . . . . . . . . . . . . 39
2.1 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
2.1.1 DC–DC Converter Structure. . . . . . . . . . . . . . . . . . . . . 39
2.1.2 Principles. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
vii
viii Contents
2.1.3 Example: The Series-Parallel 1 Converter . . . . . . . . . . . 41
2
2.2 Analysis Techniques . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
2.2.1 Charge Flow Analysis. . . . . . . . . . . . . . . . . . . . . . . . . 44
2.2.2 Charge Balance Analysis. . . . . . . . . . . . . . . . . . . . . . . 45
2.2.3 Branch Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
2.3 Topologies: Taxonomy. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
2.3.1 Topology Occurrence Theorem. . . . . . . . . . . . . . . . . . . 51
2.3.2 Up Converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
2.3.3 Down Converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
2.3.4 Multi-Topology Converters . . . . . . . . . . . . . . . . . . . . . 58
2.4 Topologies: Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
2.4.1 Dickson Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
2.4.2 Voltage Doubler. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
2.4.3 Voltage Divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
2.4.4 Fractional Converter . . . . . . . . . . . . . . . . . . . . . . . . . . 63
2.5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
3 Modeling and Design of Capacitive DC–DC Converters . . . . . . . . 65
3.1 Output Impedance Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
3.2 Design of Single-Topology Single-Operation-Point
Converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
3.2.1 Implementation Parameters . . . . . . . . . . . . . . . . . . . . . 69
3.2.2 Output Impedance Requirements. . . . . . . . . . . . . . . . . . 71
3.2.3 Output Impedance Balance. . . . . . . . . . . . . . . . . . . . . . 72
3.2.4 Parameter Substitution. . . . . . . . . . . . . . . . . . . . . . . . . 73
3.2.5 Loss Analysis. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
3.2.6 Loss Minimization . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
3.2.7 Analysis. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
3.3 Design of Multi-Topology Converters . . . . . . . . . . . . . . . . . . . 77
3.3.1 Model Refinement. . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
3.3.2 Optimization Space. . . . . . . . . . . . . . . . . . . . . . . . . . . 80
3.3.3 Multi-Objective Optimization. . . . . . . . . . . . . . . . . . . . 82
3.4 Accuracy Improvement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
3.4.1 Conventional Model . . . . . . . . . . . . . . . . . . . . . . . . . . 83
3.4.2 Modified Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
3.4.3 Cases. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
3.4.4 Measurements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
3.5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
4 Noise Reduction by Multi-Phase Interleaving
and Fragmentation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
4.1 Noise in Systems on Chip . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
4.2 Noise Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
4.2.1 Noise in the Slow Switching Limit. . . . . . . . . . . . . . . . 93
Contents ix
4.2.2 Noise in the Fast Switching Limit. . . . . . . . . . . . . . . . . 96
4.2.3 Additional Noise Sources. . . . . . . . . . . . . . . . . . . . . . . 97
4.3 Noise Power Loss . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
4.3.1 Analog Point-of-View . . . . . . . . . . . . . . . . . . . . . . . . . 99
4.3.2 Digital Point-of-View . . . . . . . . . . . . . . . . . . . . . . . . . 101
4.4 Noise Mitigation Techniques. . . . . . . . . . . . . . . . . . . . . . . . . . 102
4.4.1 Series Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
4.4.2 Multi-Phase Interleaving . . . . . . . . . . . . . . . . . . . . . . . 104
4.4.3 Capacitance Modulation by Means of Fragmentation. . . . 108
4.5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
5 Control of Fully Integrated Capacitive Converters . . . . . . . . . . . . 111
5.1 Control Nature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
5.2 Frequency-Domain Analysis. . . . . . . . . . . . . . . . . . . . . . . . . . 113
5.2.1 Frequency-Domain Analysis in FSL . . . . . . . . . . . . . . . 113
5.2.2 Frequency-Domain Analysis in SSL . . . . . . . . . . . . . . . 117
5.3 Techniques. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
5.3.1 Topology Reconfiguration . . . . . . . . . . . . . . . . . . . . . . 119
5.3.2 Capacitance Modulation. . . . . . . . . . . . . . . . . . . . . . . . 121
5.3.3 Pulse-Width Modulation . . . . . . . . . . . . . . . . . . . . . . . 123
5.3.4 Pulse-Frequency Modulation . . . . . . . . . . . . . . . . . . . . 124
5.4 Implementations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
5.4.1 Lead Compensation. . . . . . . . . . . . . . . . . . . . . . . . . . . 130
5.4.2 Lead Compensation for Multi-Phase Converters. . . . . . . 133
5.4.3 Hysteretic Discrete-Time Control . . . . . . . . . . . . . . . . . 133
5.4.4 Multi-Phase Hysteretic Discrete-Time Control . . . . . . . . 134
5.5 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
6 Monolithic Integration of DC–DC Converters in CMOS . . . . . . . . 141
6.1 Technology Framework . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
6.2 Solid-State Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
6.2.1 Operation Regions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
6.2.2 Transistor Flavors. . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
6.2.3 Parasitic Elements. . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
6.2.4 Dealing with Voltage Limitations. . . . . . . . . . . . . . . . . 148
6.3 Passive Devices. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
6.3.1 Fundamentals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
6.3.2 Metal-Oxide-Metal Capacitors . . . . . . . . . . . . . . . . . . . 152
6.3.3 Metal-Insulator-Metal Capacitors . . . . . . . . . . . . . . . . . 153
6.3.4 Metal-Oxide-Semiconductor Capacitors. . . . . . . . . . . . . 153
6.3.5 Technology Assessment. . . . . . . . . . . . . . . . . . . . . . . . 157
6.4 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
x Contents
7 DC–DC Converter Prototypes . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
7.1 Multi-Phase High-Efficiency Voltage Doubler . . . . . . . . . . . . . 159
7.1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
7.1.2 Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
7.1.3 Converter Structure. . . . . . . . . . . . . . . . . . . . . . . . . . . 160
7.1.4 System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
7.1.5 Measurement Results. . . . . . . . . . . . . . . . . . . . . . . . . . 163
7.1.6 Conclusion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
7.2 Reconfigurable Hysteretic DC–DC Converter. . . . . . . . . . . . . . 165
7.2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
7.2.2 Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
7.2.3 Converter Structure. . . . . . . . . . . . . . . . . . . . . . . . . . . 166
7.2.4 System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168
7.2.5 Measurement Results. . . . . . . . . . . . . . . . . . . . . . . . . . 171
7.2.6 Conclusion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
7.3 Single-Boundary Multi-Phase Hysteretic Converter . . . . . . . . . . 175
7.3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
7.3.2 Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
7.3.3 Converter Structure. . . . . . . . . . . . . . . . . . . . . . . . . . . 175
7.3.4 System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176
7.3.5 Measurement Results. . . . . . . . . . . . . . . . . . . . . . . . . . 180
7.3.6 Conclusion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185
7.4 Phase-Handover Hysteretic Capacitive Converter
with Feed-Forward Topology Control . . . . . . . . . . . . . . . . . . . 185
7.4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185
7.4.2 Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186
7.4.3 Converter Structure. . . . . . . . . . . . . . . . . . . . . . . . . . . 187
7.4.4 System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189
7.4.5 Measurement Results. . . . . . . . . . . . . . . . . . . . . . . . . . 195
7.4.6 Conclusion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 198
7.5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199
8 Conclusions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 201
8.1 Need for On-Chip DC–DC Conversion . . . . . . . . . . . . . . . . . . 201
8.2 DC–DC Converter Types for Fully Integrated
Power Management. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 202
8.3 Noise Reduction in Fully Integrated DC–DC Converters . . . . . . 203
8.4 Control of Fully Integrated DC–DC Converters. . . . . . . . . . . . . 204
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 205
Abbreviations, Symbols and Quantities
Abbreviations
ABB Adaptive body biasing
AVS Adaptive voltage scaling
AC Alternating current
CMOS Complementary metal-oxide-semiconductor
DC Direct current
DDSM Deep deep sub micron
DUT Device under test
DVS Dynamic voltage scaling
EEF Effciency enhancement factor
ESD Electro static discharge
FF Feed-forward
FSL Fast switching limit
FBB Forward body biasing
FOM Figure of merit
GBW Gain-bandwidth
IC Integrated circuit
ITRS International technology roadmap for semiconductors
IVCR Ideal voltage conversion ratio
LDO Low drop out regulator
LUT Look up table
MIM Metal-insulator-metal, type of capacitor
MOM Metal-oxide-metal, type of capacitor
N/PMOS n-type/p-type MOS transistor
N Voltage conversion ratio
OLG Open loop gain
OIB Output impedance balancing
PCB Printed circuit board
POL Point of load
xi