clock and data recovery for high-speed adc-based receivers - TSpace

105 Pages·2010·1.89 MB·English

C D R
LOCK AND ATA ECOVERY FOR
H -S ADC-B R
IGH PEED ASED ECEIVERS
by
OleksiyTyshchenko
Athesissubmittedinconformitywiththerequirements
forthedegreeofDoctorofPhilosophy
GraduateDepartmentofElectricalandComputerEngineering
UniversityofToronto
©CopyrightbyOleksiyTyshchenko2011
CLOCK AND DATA RECOVERY FOR
HIGH-SPEED ADC-BASED RECEIVERS
OleksiyTyshchenko
DoctorofPhilosophy,2011
GraduateDepartmentofElectricalandComputerEngineering
UniversityofToronto
ABSTRACT
T
HIS THESIS EXPLORES the clock and data recovery (CDR) for the high-speed
blind-sampling ADC-based receivers. This exploration results in two new CDR ar-
chitecturesthatreducethereceivercomplexityandsavetheADCpowerandareacompared
tothepreviouswork. ThetwoproposedCDRarchitecturesconstitutetheprimarycontribu-
tionsofthisthesis.
The first proposed architecture, a 2x feed-forward CDR architecture, eliminates the
interpolating feedback loop, used in the previously reported CDRs, in order to reduce the
CDRcircuitcomplexity. Insteadofthefeedbackloop,theproposedarchitectureusesafeed-
forwardtopologytorecoverthephaseanddatadirectlyfromtheblinddigitalsamplesofthe
receivedsignal. The2xfeed-forwardCDRarchitecturewasimplementedandcharacterized
ina5Gb/sreceivertest-chipin65nmCMOS.Thetest-chipmeasurementsconfirmthatthe
CDR successfully recovers the data with bit error rate (BER) ≤10−12 in the presence of
jitter.
Thesecondproposedarchitecture, afractional-sampling-rate(FSR)CDRarchitecture,
reduces the receiver sampling rate from the typical integer rate of 2x the baud rate to a
fractional rate between 2x and 1x in order to reduce the ADC power and area. This archi-
tectureemploysthefeed-forwardtopologyofthefirstcontributionofthisthesistorecover
ii
iii
thephaseanddatafromthefractionally-spaceddigitalsamplesofthesignal. Toverifythe
proposed FSR CDR architecture, a 1.45x receiver test-chip was implemented and charac-
terized in 65nm CMOS. This test-chip recovers 6.875Gb/s data from the ADC samples
takenat10GS/s. Themeasurementsconfirmasuccessfuldatarecoveryinthepresenceof
jitter with BER ≤10−12. With sampling at 1.45x, the FSR CDR architecture reduces the
ADCpowerandareaby27.3%comparedtothe2xfeed-forwardCDRarchitecture,while
theoverallreceiverpowerandareaarereducedby12.5%.
Acknowledgments
GRADUATE STUDIES is a lot like a long journey. Sometimes it seems interesting
and exciting, while sometimes it seems hard and endless. Along the way of this
journey I met a lot of people and saw a lot of places. These people and places helped
me and inspired me to complete my journey evenat times when the journeyseemed to be
never-ending. Now, comingclosetotheendofmygraduatestudies, Iwouldliketothank
the people who helped me and reflect upon the places that inspired me through out my
graduateschoolyears.
First of all, I thank my supervisor, Prof.Ali Sheikholeslami, for his guidance through
the course of my Ph.D. work. His enthusiasm and insights have been a great source of
encouragement for me. I also thank Prof.Sheikholeslami for helping me to realize that
the graduate school in engineering is more than a technical education, rather it is a great
learningexperienceofsolvingproblemsandachievinggoals.
I thank Dr.Hirotaka Tamura of Fujitsu Laboratories Limited (FLL), Kawasaki, Japan,
for his helpful comments, suggestions and constructive criticism at all stages of my Ph.D.
projects: from the project definitions, through architecture development and circuit imple-
mentation,allthewaytotest-chipmeasurementsandpublishingtheresults. Tamura-sensei,
youwereverymuchlikeaco-supervisorformeduringmyPh.D.studies,andIthankyou
forallyourhelp.
I am thankful to the members of my Ph.D. oral examination committee: Prof.David
Johns,Prof.TonyChanCarusone,Prof.SorinVoinigescu,Prof.WaiTungNg,Prof.WeiYu;
and my thesis appraiser Prof.Michael Green for their criticism of this work and valuable
feedback.
I thank the former and current graduate students of Ali-group: Kostas Pagiamtzis,
Marcus van Ierssel, David Halupka, Jeff Chow, Scott McLeod, Pradip Thachil, Tina Tah-
iv
v
moureszadeh,SafeenHuda,ShayanShahramian,BehroozAbiri,andSiamakSarvari,who
helpedmeturnmygraduateschoolyearsintoaninteresting,enjoyableanddiversepartof
my life. It was a great pleasure meeting them, working with them, and getting to know
them. I greatly appreciate the support of Kostas Pagiamtzis and Marcus van Ierssel, who
completedtheirgraduatestudiesbeforeIdid,andwhohelpedmebelievethatthisjourney
will eventually come to an end. Special thanks go to David Halupka with whom over the
pastseveralyearsIsharedthecubicle,mygoodandbadnews,myexcitementandfrustra-
tions. Naturally, he shared the same with me, and I had to listen to all that. David, thank
youforyourpatiencewithstandingmealltheseyears.
During my graduate studies I spent most of the time in Toronto, Canada. However, I
was lucky enough to see other places as well. The places are strongly associated with the
people who helped me see, explore and enjoy these places. I would like to thank these
peoplenext.
IthankWilliamWalker,NikolaNedovic,NestorasTzartzanis,FrancisRotellaandMag-
nusWiklundofFujitsuLaboratoriesofAmerica(FLA),Sunnyvale,CA,forwelcomingme
totheirteamasaninternforhalf-a-year. Itwasmypleasuretolearnfromandtoworkwith
the FLA team. I also thank the FLA team for allowing me to experience a professional,
goodandfriendlyworkenvironment.
Duringthisinternship,IhadagreatchancetoexploretheBayAreainCalifornia,and
I thank people who helped me turn this time into an experience to remember. I thank
Jeff Chow for allowing me to “take over” his life during his leave from California, which
convenientlycoincidedwithmyinternship. Forseveralmonths,IstayedatJeff’sapartment,
I drove Jeff’s car, and I used Jeff’s cell phone, which made my settling in San Jose, CA,
very smooth. I thank Kostas Pagiamtzis and Irene Goldthorpe for accompanying me on a
largenumberoftripsinCalifornia. IalsothankIreneandKostasforhelpingmetorealize
thatloosingabetcanbejustaspleasantaswinningit.
I thank Laura Fujino and Prof.K.C.Smith for inviting me to attend the International
Solid-State Circuits Conference (ISSCC) as a student volunteer six consecutive times dur-
ing my graduate studies. The ISSCC attendance helped me to remain aware of the most
recent research work in the area of electronics performed all over the world both in indus-
tryandinacademia. Beingpartofthevolunteersteamhelpedmetogettoknowbettermy
fellowgraduatestudents,andtorealizewhatagoodteamisallabout. IfurtherthankLaura
vi
andProf.Smithforsharingtheirlifewisdomwithmeduringtherareuneventfulbreaksat
ISSCC.
Withalltheintenseschedulesofthegraduatestudies,Iamgratefultomyfriendswho
helpedmediscoverbeautifulplacesandexperiencememorableadventuresduringtheshort
vacations away from the school matters. I thank Valeri Kirischian and Irina Ivanova for
showingmethebeautyoftheProvinceofOntariothroughnumeroushiking,campingand
canoeing adventures. I am particularly thankful to Valeri and Irina for helping me experi-
ence the wilderness of Lake Temagami, Ontario, with its rapidly changing weather, stren-
uous canoeing and portaging, beaver dams across tiny rivers, camp fires, starry skies, and
sometimesevenpolarlights. IthankRomanOchoukovforaccompanyingmewhileexplor-
ing the cities of the East Coast: Toronto, Boston, New York, Montreal, to name some of
them. I also thank Roman for his moral support during my graduate studies. Whenever I
thought that the graduate life was hard at the University of Toronto, it was enough to chat
with Roman to remind myself that life is even harder at MIT. I thank Kostas Pagiamtzis,
IreneGoldthorpe,ScottMcLeodandKevinBanovicforjoiningmeforaskydivingadven-
ture—mymostextremeexperiencesofar. Thelongjourneyofthegraduatestudiesdiffers
on so many levels from a one minute long free-fall. Yet there is one thing is common
betweenthesetwoexperiences: itislessstressfultoreflectuponthembothinretrospect.
I thank my parents for their unconditional support through the years of my studies.
Last,butnotleast,Ithankmywife,KatyaTyshchenko,forbeingbymysidedespiteallthe
challenges of her own graduate studies. I further thank Katya for being with me through
mostofmyexperiencesofthegraduateyears: fromcourseprojectstooutdoorsadventures.
Approachingtheendofmystudies,Irealizethatitisnottheend-goalitselfthatmatters,
ratheritisthewaytowardsthegoalthatisimportant. Meetingthepeoplewhohelpedme,
anddiscoveringtheplacesthatinspiredmebecameaninvaluableexperienceforme. After
all,thejourneyofstudiesissimplyapartofalargerjourneyoflife.
Contents
ListofTables ix
ListofFigures x
ListofAbbreviations xii
Chapter1 Introduction 1
1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 DesignChallengesandApproaches . . . . . . . . . . . . . . . . . . . . . 3
1.3 ThesisContributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.4 ThesisOutline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Chapter2 FundamentalsofClockandDataRecoveryin
High-SpeedReceivers 6
2.1 BuildingBlocksofaHigh-SpeedReceiver . . . . . . . . . . . . . . . . . . 6
2.1.1 ChannelProperties . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1.2 Equalization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1.3 ClockandDataRecovery . . . . . . . . . . . . . . . . . . . . . . 13
2.1.4 SignalEnergyConsiderations . . . . . . . . . . . . . . . . . . . . 15
2.2 CDRArchitecturesforBinary-SamplingReceivers . . . . . . . . . . . . . 16
2.2.1 Phase-TrackingCDRArchitecture . . . . . . . . . . . . . . . . . . 17
2.2.2 OversamplingCDRArchitecture . . . . . . . . . . . . . . . . . . . 21
2.3 CDRArchitecturesforADC-BasedReceivers . . . . . . . . . . . . . . . . 23
2.3.1 Mueller-Mu¨llerCDRArchitecture . . . . . . . . . . . . . . . . . . 24
2.3.2 InterpolatingFeedbackCDRArchitecture . . . . . . . . . . . . . . 28
2.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Chapter3 AnADC-BasedFeed-ForwardCDRArchitecture 35
3.1 Feed-ForwardCDRArchitecture . . . . . . . . . . . . . . . . . . . . . . . 36
3.2 Phase-DetectionScheme . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
3.3 Phase-RecoveryFilter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
vii
Contents viii
3.4 Data-DecisionScheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
3.5 DataRetimingScheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
3.6 SimulationandMeasurementResults . . . . . . . . . . . . . . . . . . . . 52
3.7 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Chapter4 AFractional-Sampling-RateCDRArchitecture 58
4.1 Fractional-Sampling-RateCDRArchitecture. . . . . . . . . . . . . . . . . 59
4.2 Phase-DetectionSchemes . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
4.2.1 Eye-BasedPhaseDetector . . . . . . . . . . . . . . . . . . . . . . 61
4.2.2 Transition-BasedPhaseDetector . . . . . . . . . . . . . . . . . . . 64
4.3 Phase-RecoveryFilter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
4.4 Data-DecisionScheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
4.5 DataCompactionSchemes . . . . . . . . . . . . . . . . . . . . . . . . . . 73
4.5.1 Shift-RegisterDataCompactor . . . . . . . . . . . . . . . . . . . . 73
4.5.2 Selector-ArrayDataCompactor . . . . . . . . . . . . . . . . . . . 74
4.6 DataRetimingScheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
4.7 SimulationandMeasurementResults . . . . . . . . . . . . . . . . . . . . 77
4.8 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Chapter5 Conclusions 83
5.1 ThesisContributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
5.2 FutureDirections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
References 87
List of Tables
2.1 Recentlypublishedhigh-speedreceivers. . . . . . . . . . . . . . . . . . . . . . 33
3.1 Jittertolerancesimulationconditions(inFigure3.14). . . . . . . . . . . . . . . 52
3.2 Test-chipparameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
3.3 Jittertolerancemeasurementandsimulationconditions(inFigure3.17). . . . . 56
(cid:177)
4.1 Samplingphasesforthesamplingrateof 16 11 ≈1.45x.. . . . . . . . . . . . 63
4.2 Conditionalselectortruthtable. . . . . . . . . . . . . . . . . . . . . . . . . . . 76
4.3 Test-chipparameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
ix
List of Figures
1.1 ITRSprojectionforchip-to-chipinterconnectdatarates. . . . . . . . . . . . . 2
2.1 Simplifieddiagramofaninterconnect. . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Functionalblock-diagramofahigh-speedreceiver. . . . . . . . . . . . . . . . 7
2.3 Channelresponseintimeandfrequencydomains. . . . . . . . . . . . . . . . . 8
2.4 Equalizationwithafilterinthefrequencydomain. . . . . . . . . . . . . . . . . 10
2.5 Feed-forwardequalization(FFE). . . . . . . . . . . . . . . . . . . . . . . . . 11
2.6 Decisionfeedbackequalization(DFE). . . . . . . . . . . . . . . . . . . . . . . 12
2.7 Clockingschemes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.8 Classificationofhigh-speedreceiverswithcorrespondingCDRexamples. . . . 15
2.9 Binarysampling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.10 Simplifiedblock-diagramofaphase-trackingCDR. . . . . . . . . . . . . . . . 17
2.11 Phasedetectioninthephase-trackingCDR. . . . . . . . . . . . . . . . . . . . 18
2.12 Phase-trackingfeedbackloop. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.13 Jittertransferandtoleranceofthephase-trackingCDR. . . . . . . . . . . . . . 20
2.14 Simplifiedblock-diagramofanoversamplingCDR. . . . . . . . . . . . . . . . 21
2.15 Phasedetectioninthe3xoversamplingCDR. . . . . . . . . . . . . . . . . . . 21
2.16 Jittertoleranceofthe3xoversamplingCDR.. . . . . . . . . . . . . . . . . . . 23
2.17 SamplingwithanADC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2.18 Simplifiedblock-diagramofaMueller-Mu¨llerCDR. . . . . . . . . . . . . . . 24
2.19 Mueller-Mu¨llertimingrecoveryfromanimpulseresponse. . . . . . . . . . . . 25
2.20 Mueller-Mu¨llertimingrecoveryfromcontinuousdata. . . . . . . . . . . . . . 26
2.21 JittertoleranceoftheMueller-Mu¨llerCDR. . . . . . . . . . . . . . . . . . . . 27
2.22 Simplifiedblock-diagramofaninterpolatingfeedbackCDR. . . . . . . . . . . 28
2.23 BlindandinterpolatedsamplesintheinterpolatingfeedbackCDR. . . . . . . . 28
2.24 Linearinterpolation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.25 JittertoleranceoftheinterpolatingfeedbackCDR. . . . . . . . . . . . . . . . 30
2.26 Simplifiedblock-diagramofajoint-adaptation-basedCDR[43]. . . . . . . . . 31
3.1 Proposedfeed-forwardCDRarchitecture(simplifiedblock-diagram). . . . . . 36
3.2 Receiverwiththeproposedfeed-forwardCDRarchitecture. . . . . . . . . . . . 37
x