Photos placed in horizontal position with even amount of white space between photos and header Benchmarking quantum annealing for community detection on synthetic social networks Ojas Parekh Sandia National Labs AQC, 2014 Sandia National Laboratories is a multi-program laboratory managed and operated by Sandia Corporation, a wholly owned subsidiary of Lockheed Martin Corporation, for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-AC04-94AL85000. SAND NO. 2011-XXXXP A question? Which is harder (pick a reasonable definition of “hard”)? Finding an optimal solution Finding a solution within 99% of the time 99% of optimal all the time Which is more practically relevant? 2 A question? Which is harder (pick a reasonable definition of “hard”)? Finding an optimal solution Finding a solution within 99% of the time 99% of optimal all the time “Average”-‐case analysis, Approximation algorithm, rather than worst-‐case or approximation scheme 3 How should we measure success? 7 Optimal 99% of the time Within 99% of optimal all of the time 55,000 random {-1,1}-weight instances on 509-qubit D-Wave Two 40000 30000 20000 10000 0 96 97 98 99 100 % of optimal Was always within 96% of optimal! 4 FIG. 4. Speedup for ratio of quantiles for the DW2 FIG. 5. Comparing wall-clock times A comparison of the compared to SA. A) For instances with range r = 1. B) waLlle-cUloc:k Rtiomnentoofiwnd ethte asoll.u, tDionewfiinthinprgo baabnildit ydpe=te0c.9.9ng quantum speedup, arXiv:1401.2910v1 (2014) For instances with range r = 7. Shown are curves from the for SA running on a single CPU (dashed lines) compared to median (50th quantile) to the 99th quantile. 16 gauges were the DW2 (solid lines) using 16 gauges. A) for range r = 1, used. In these plots we multiplied Eq. (6) by 512 so that B) for range r = 7. Shown are curves from the median (50th the speedup value at N = 512 directly compares one DW2 quantile) to the 99th quantile. The large constant program- processor against one classical CPU. ming overhead of the DW2 masks the exponential increase of time to solution that is obvious in the plots of pure annealing time. Results for a single gauge are shown in the Supplemen- tary Material. the DW2 does not exhibit a speedup over SA for this particular benchmark. D. Instance-by-instance comparison 1. Total time to solution We now focus on the question of whether the DW2 exhibits a limited quantum speedup for some fraction of 3. Wall-clock time the instances of our benchmark set. To this end we per- form individual comparisons for each instance and show in Figure 6A-B the ratios of time to solution between While not as interesting from a complexity theory the DW2 and SA, considering only the pure annealing point of view, it is instructive to also compare wall-clock time. We find a wide scatter, which is not surprising timesfortheabovebenchmarks, aswedoinFigure5. We since we previously found that DW1 performs like a sim- observe that the DW2 performs similarly to SA run on a ulated quantum annealer, but correlates less well with a single classical CPU, for su�ciently large problem sizes simulated classical annealer [25]. We find that while the and at high range values. Note that the large constant DW2 is sometimes up to 10 faster in pure annealing ⇥ programming overhead of the DW2 masks the exponen- time, there are many cases where it is 100 slower. � ⇥ tial increase of time to solution that is obvious in the Considering the wall-clock times, the advantage of the plots of pure annealing time. DW2 seen in Figure 6A-B for some instances tends to We ask ▪ What is an appropriate measure of success? ▪ What classical algorithm(s) should be used for comparison? ▪ How should one select appropriate benchmark instances? 5 Problem definitions ▪ Ising: min J x x + h x ij i j i i x 1,1 i 2{� } ij i X X ! ▪ Quadratic binary unconstrained optimization (QUBO): min A x x + c x ij i j i i x 0,1 i 2{ } ij i X X 6 Comparison*of*Rainier*and*Vesuvius*chips* Vesuvius* Rainier* 506/512* 108/128* spins* spins* Images from D-‐Wave Systems: hbp://www.dwavesys.com . 7 Complexity of Ising on Chimera ▪ (Decision version) NP-‐complete even with no linear term and {-‐1, 0, 1} weights [Barahona, 1982] ▪ We show NP-‐complete with no linear term and {-‐1,1} weights ▪ Instances used in D-‐Wave benchmarking studies [with Benjamin Moseley at Washington University] ▪ Tree-‐width (path-‐width) is , yielding p n algorithm ⇥(pn) O(2 ) ▪ “Subexponential” exact algorithm even though NP-‐hard ▪ Approximation complexity? ▪ Polynomial-‐time approximation scheme (PTAS) [Saket, 2013, arXiv:1306.6943] ▪ PTAS’s are rarely efficient; theory vs practice? ▪ Efficient approx algorithm for say, getting within 75%? 8 G can be solved in an adiabatic quantum computer that implements the spin-1/2 Ising Hamiltonian, by reduction through minor-embedding of G in the quantum hardware graph U. By reduction through minor-embedding, we mean that one can reduce the original Ising Hamiltonian on the input graph G to the embed- emb ded Ising Hamiltonian on its minor-embedding G , i.e., the solution emb H to the embedded Ising Hamiltonian gives rise to the solution to the original Ising Hamiltonian. We proved the correctness of the minor-embedding reduc- tion. There are two components to the reduction: embedding and parameter setting. The embedding problem is to find a minor-embedding G of a graph emb G in U. The parameter setting problem is to set the corresponding parameters, qubit bias and coupler strengths, of the embedded Ising Hamiltonian. In [6], we solved the parameter setting problem. The embedding problem, though, is dependent on the hardware graph design problem discussed in the following sections. Approaches to problem embedding 4 TRIAD: Optimal Hardware Graph for Embedding Complete Graph K n ▪ Embedding is hard: O(nn) vs O(2n) In this section, we describe a K -minor hardware graph, where K is a complete n n ▪ Even harder when optimizing # qubits graph of n vertices. A triangular layout of a K -minor graph [18], called T , RIAD n is shown in Figure 3. ▪ Choi: worst case O(n2) qubits for n vars ▪ Requires (linearly) large coupler weights 1 8 3 4 1 7 2 8 2 5 1 6 2 7 3 8 1 5 2 6 3 7 4 8 1 6 1 4 2 5 3 6 4 7 5 8 1 3 2 4 3 5 4 6 5 7 6 8 8 7 1 2 2 3 3 4 4 5 5 6 6 7 7 8 9 Fig.3: Left, K . Right, a triangular layout of a K -minor. Each vertex of K is mapped to a chain 8 8 8 of 7 “virtual” vertices (with the same color). 4.1 Construction of TRIAD The idea behind the construction of T is to map each vertex of K to a RIAD n chain of n 1 “virtual” vertices. The inductive construction is illustrated in � Figure 4. Limits of reducing to Chimera ▪ Can we do better than a quadratic blowup in qubits? ▪ Probably not, due to Exponential Time Hypothesis ▪ Problems like Max-‐Cut on general graphs are conjectured n to require O ( 2 ) time pn ▪ But we have a O ( 2 ) time algorithm for Chimera Ising ▪ So in some sense quadratic factor is artifact of Chimera ▪ Weights make this worse: Choi embedding assumes (linearly) large weights 2 ▪ Reduction better than O ( n ) for Max-‐Cut on bounded-‐degree graphs would improve best-‐known classical algorithm ▪ Applies to any reduction, not just minor embeddings 10
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