August 03, 2006 | 202 pages | 3.77 Mb Allied Electronics PDF
Preview August 03, 2006 | 202 pages | 3.77 Mb Allied Electronics
PIC16F688 Data Sheet 14-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology © 2006 Microchip Technology Inc. DS41203C Note the following details of the code protection feature on Microchip devices: (cid:129) Microchip products meet the specification contained in their particular Microchip Data Sheet. (cid:129) Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. (cid:129) There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. (cid:129) Microchip is willing to work with the customer who is concerned about the integrity of their code. (cid:129) Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, Accuron, and may be superseded by updates. It is your responsibility to dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, ensure that your application meets with your specifications. PROMATE, PowerSmart, rfPIC and SmartShunt are MICROCHIP MAKES NO REPRESENTATIONS OR registered trademarks of Microchip Technology Incorporated WARRANTIES OF ANY KIND WHETHER EXPRESS OR in the U.S.A. and other countries. IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, INCLUDING BUT NOT LIMITED TO ITS CONDITION, SEEVAL, SmartSensor and The Embedded Control Solutions QUALITY, PERFORMANCE, MERCHANTABILITY OR Company are registered trademarks of Microchip Technology FITNESS FOR PURPOSE. Microchip disclaims all liability Incorporated in the U.S.A. arising from this information and its use. Use of Microchip Analog-for-the-Digital Age, Application Maestro, CodeGuard, devices in life support and/or safety applications is entirely at dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, the buyer’s risk, and the buyer agrees to defend, indemnify and ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, hold harmless Microchip from any and all damages, claims, In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active suits, or expenses resulting from such use. No licenses are Thermistor, Mindi, MiWi, MPASM, MPLIB, MPLINK, PICkit, conveyed, implicitly or otherwise, under any Microchip PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, intellectual property rights. PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2006, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona, Gresham, Oregon and Mountain View, California. The Company’s quality system processes and procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. DS41203C-page ii © 2006 Microchip Technology Inc. PIC16F688 14-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology High-Performance RISC CPU: Low-Power Features: (cid:129) Only 35 instructions to learn: (cid:129) Standby Current: - All single-cycle instructions except branches - 50nA @ 2.0V, typical (cid:129) Operating speed: (cid:129) Operating Current: - DC – 20MHz oscillator/clock input - 11μA @ 32kHz, 2.0V, typical - DC – 200ns instruction cycle - 220μA @ 4MHz, 2.0V, typical (cid:129) Interrupt capability (cid:129) Watchdog Timer Current: (cid:129) 8-level deep hardware stack - 1μA @ 2.0V, typical (cid:129) Direct, Indirect and Relative Addressing modes Peripheral Features: Special Microcontroller Features: (cid:129) 12 I/O pins with individual direction control: (cid:129) Precision Internal Oscillator: - High-current source/sink for direct LED drive - Factory calibrated to ±1% - Interrupt-on-change pin - Software selectable frequency range of - Individually programmable weak pull-ups 8MHz to 125kHz - Ultra Low-Power Wake-up - Software tunable - Two-Speed Start-Up mode (cid:129) Analog Comparator module with: - Crystal fail detect for critical applications - Two analog comparators - Clock mode switching during operation for - Programmable On-chip Voltage Reference power savings (CVREF) module (% of VDD) (cid:129) Power-Saving Sleep mode - Comparator inputs and outputs externally (cid:129) Wide operating voltage range (2.0V-5.5V) accessible (cid:129) Industrial and Extended temperature range (cid:129) A/D Converter: (cid:129) Power-on Reset (POR) - 10-bit resolution and 8 channels (cid:129) Power-up Timer (PWRT) and Oscillator Start-up (cid:129) Timer0: 8-bit timer/counter with 8-bit Timer (OST) programmable prescaler (cid:129) Brown-out Reset (BOR) with software control (cid:129) Enhanced Timer1: option - 16-bit timer/counter with prescaler (cid:129) Enhanced Low-Current Watchdog Timer (WDT) - External Timer1 Gate (count enable) with on-chip oscillator (software selectable nomi- - Option to use OSC1 and OSC2 in LP mode as nal 268 seconds with full prescaler) with software Timer1 oscillator if INTOSC mode selected enable (cid:129) Enhanced USART Module: (cid:129) Multiplexed Master Clear with weak pull-up or - Supports RS-485, RS-232, and LIN 1.2 input only pin - Auto-Baud Detect (cid:129) Programmable code protection - Auto-wake-up on Start bit (cid:129) High-Endurance Flash/EEPROM cell: (cid:129) In-Circuit Serial Programming™ (ICSP™) via two - 100,000 write Flash endurance pins - 1,000,000 write EEPROM endurance - Flash/Data EEPROM retention: > 40 years Program Data Memory Memory 10-bit A/D Timers Device I/O Comparators Flash SRAM EEPROM (ch) 8/16-bit (words) (bytes) (bytes) PIC16F688 4096 256 256 12 8 2 1/1 © 2006 Microchip Technology Inc. DS41203C-page 1 PIC16F688 Pin Diagram (PDIP, SOIC, TSSOP) 14-pin PDIP, SOIC, TSSOP VDD 1 14 VSS RA5/T1CKI/OSC1/CLKIN 2 13 RA0/AN0/C1IN+/ICSPDAT/ULPWU RA4/AN3/T1G/OSC2/CLKOUT 3 8 12 RA1/AN1/C1IN-/VREF/ICSPCLK 8 6 RA3/MCLR/VPP 4 F 11 RA2/AN2/T0CKI/INT/C1OUT 6 1 RC5/RX/DT 5 C 10 RC0/AN4/C2IN+ PI RC4/C2OUT/TX/CK 6 9 RC1/AN5/C2IN- RC3/AN7 7 8 RC2/AN6 TABLE 1: PIC16F688 14-PIN SUMMARY (PDIP, SOIC, TSSOP) I/O Pin Analog Comparators Timers EUSART Interrupt Pull-up Basic RA0 13 AN0/ULPWU C1IN+ — — IOC Y ICSPDAT RA1 12 AN1 C1IN- — — IOC Y VREF/ICSPCLK RA2 11 AN2 C1OUT T0CKI — IOC/INT Y — RA3 4 — — — — IOC Y(1) MCLR/VPP RA4 3 AN3 — T1G — IOC Y OSC2/CLKOUT RA5 2 — — T1CKI — IOC Y OSC1/CLKIN RC0 10 AN4 C2IN+ — — — — — RC1 9 AN5 C2IN- — — — — — RC2 8 AN6 — — — — — — RC3 7 AN7 — — — — — — RC4 6 — C2OUT — TX/CK — — — RC5 5 — — — RX/DT — — — — 1 — — — — — — VDD — 14 — — — — — — VSS Note 1: Pull-up activated only with external MCLR configuration. DS41203C-page 2 © 2006 Microchip Technology Inc. PIC16F688 Pin Diagram (QFN) 16-pin QFN DD C C SS V N N V 6 5 4 3 1 1 1 1 RA5/T1CKI/OSC1/CLKIN 1 12 RA0/AN0/C1IN+/ICSPDAT/ULPWU RA4/AN3/T1G/OSC2/CLKOUT 2 11 RA1/AN1/C1IN-/VREF/ICSPCLK PIC16F688 RA3/MCLR/VPP 3 10 RA2/AN2/T0CKI/INT/C1OUT RC5/RX/DT 4 9 RC0/AN4/C2IN+ 5 6 7 8 CK N7 N6 N- UT/TX/ RC3/A RC2/A N5/C2I A C2O C1/ 4/ R C R TABLE 2: PIC16F688 16-PIN SUMMARY (QFN) I/O Pin Analog Comparators Timers EUSART Interrupt Pull-up Basic RA0 12 AN0/ULPWU C1IN+ — — IOC Y ICSPDAT RA1 11 AN1 C1IN- — — IOC Y VREF/ICSPCLK RA2 10 AN2 C1OUT T0CKI — IOC/INT Y — RA3 3 — — — — IOC Y(1) MCLR/VPP RA4 2 AN3 — T1G — IOC Y OSC2/CLKOUT RA5 1 — — T1CKI — IOC Y OSC1/CLKIN RC0 9 AN4 C2IN+ — — — — — RC1 8 AN5 C2IN- — — — — — RC2 7 AN6 — — — — — — RC3 6 AN7 — — — — — — RC4 5 — C2OUT — TX/CK — — — RC5 4 — — — RX/DT — — — — 16 — — — — — — VDD — 13 — — — — — — VSS — 14 — — — — — — NC — 15 — — — — — — NC Note 1: Pull-up activated only with external MCLR configuration. © 2006 Microchip Technology Inc. DS41203C-page 3 PIC16F688 Table of Contents 1.0 Device Overview......................................................................................................................................................................... 5 2.0 Memory Organization.................................................................................................................................................................. 7 3.0 Clock Sources........................................................................................................................................................................... 21 4.0 I/O Ports.................................................................................................................................................................................... 33 5.0 Timer0 Module.......................................................................................................................................................................... 45 6.0 Timer1 Module with Gate Control.............................................................................................................................................. 49 7.0 Comparator Module................................................................................................................................................................... 55 8.0 Analog-to-Digital Converter (A/D) Module................................................................................................................................. 65 9.0 Data EEPROM and Flash Program Memory Control................................................................................................................ 77 10.0 Enhanced Universal Asynchronous Receiver Transmitter (EUSART)...................................................................................... 83 11.0 Special Features of the CPU................................................................................................................................................... 109 12.0 Instruction Set Summary......................................................................................................................................................... 129 13.0 Development Support ..............................................................................................................................................................139 14.0 Electrical Specifications........................................................................................................................................................... 143 15.0 DC and AC Characteristics Graphs and Tables...................................................................................................................... 163 16.0 Packaging Information............................................................................................................................................................. 185 Appendix A: Data Sheet Revision History......................................................................................................................................... 191 Appendix B: Migrating from other PICmicro® Devices..................................................................................................................... 191 Index................................................................................................................................................................................................. 193 On-line Support .................................................................................................................................................................................197 Systems Information and Upgrade Hot Line..................................................................................................................................... 197 Reader Response............................................................................................................................................................................. 198 Product Identification System............................................................................................................................................................ 199 TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at [email protected] or fax the Reader Response Form in the back of this data sheet to (480) 792-4150. We welcome your feedback. Most Current Data Sheet To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at: http://www.microchip.com You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page. The last character of the literature number is the version number, (e.g., DS30000A is version A of document DS30000). Errata An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the revision of silicon and revision of document to which it applies. To determine if an errata sheet exists for a particular device, please check with one of the following: (cid:129) Microchip’s Worldwide Web site; http://www.microchip.com (cid:129) Your local Microchip sales office (see last page) When contacting a sales office, please specify which device, revision of silicon and data sheet (include literature number) you are using. Customer Notification System Register on our web site at www.microchip.com to receive the most current information on all of our products. DS41203C-page 4 © 2006 Microchip Technology Inc. PIC16F688 1.0 DEVICE OVERVIEW The PIC16F688 is covered by this data sheet. It is available in 14-pin PDIP, SOIC, TSSOP and QFN packages. Figure1-1 shows a block diagram of the PIC16F688 device. Table1-1 shows the pinout description. FIGURE 1-1: PIC16F688 BLOCK DIAGRAM INT Configuration 13 8 PORTA Data Bus Program Counter RA0 Flash 4k x 14 RA1 Program RA2 RAM Memory 8-Level Stack 256 bytes RA3 (13 bit) File RA4 Registers RA5 Program 14 Bus RAM Addr 9 Addr MUX Instruction Reg PORTC Direct Addr 7 Indirect 8 Addr RC0 RC1 FSR Reg RC2 RC3 STATUS Reg 8 RC4 RC5 3 Power-up MUX Timer Instruction Oscillator Decode & Start-up Timer ALU Control Power-on 8 Reset OSC1/CLKIN GeTnimeriantgion WaTticmhedrog W Reg Brown-out OSC2/CLKOUT Reset Internal Oscillator Block RX/DT TX/CK T1G MCLR VDD VSS T1CKI Timer0 Timer1 EUSART T0CKI 2 Analog-to-Digital Converter Analog Comparators EEDAT and Reference 256 bytes 8 DATA EEPROM EEADDR VREF AN0 AN1AN2 AN3 AN4 AN5 AN6AN7 C1IN- C1IN+ C1OUT C2IN- C2IN+ C2OUT © 2006 Microchip Technology Inc. DS41203C-page 5 PIC16F688 TABLE 1-1: PIC16F688 PINOUT DESCRIPTION Input Output Name Function Description Type Type RA0/AN0/C1IN+/ICSPDAT/ULPWU RA0 TTL CMOS PORTA I/O w/prog pull-up and interrupt-on-change AN0 AN — A/D Channel 0 input C1IN+ AN — Comparator 1 input ICSPDAT TTL CMOS Serial Programming Data I/O ULPWU AN — Ultra Low-Power Wake-up input RA1/AN1/C1IN-/VREF/ICSPCLK RA1 TTL CMOS PORTA I/O w/prog pull-up and interrupt-on-change AN1 AN — A/D Channel 1 input C1IN- AN — Comparator 1 input VREF AN — External Voltage Reference for A/D ICSPCLK ST — Serial Programming Clock RA2/AN2/T0CKI/INT/C1OUT RA2 ST CMOS PORTA I/O w/prog pull-up and interrupt-on-change AN2 AN — A/D Channel 2 input T0CKI ST — Timer0 clock input INT ST — External Interrupt C1OUT — CMOS Comparator 1 output RA3/MCLR/VPP RA3 TTL — PORTA input with interrupt-on-change MCLR ST — Master Clear w/internal pull-up VPP HV — Programming voltage RA4/AN3/T1G/OSC2/CLKOUT RA4 TTL CMOS PORTA I/O w/prog pull-up and interrupt-on-change AN3 AN — A/D Channel 3 input T1G ST — Timer1 gate OSC2 — XTAL Crystal/Resonator CLKOUT — CMOS FOSC/4 output RA5/T1CKI/OSC1/CLKIN RA5 TTL CMOS PORTA I/O w/prog pull-up and interrupt-on-change T1CKI ST — Timer1 clock OSC1 XTAL — Crystal/Resonator CLKIN ST — External clock input/RC oscillator connection RC0/AN4/C2IN+ RC0 TTL CMOS PORTC I/O AN4 AN — A/D Channel 4 input C2IN+ AN Comparator 2 input RC1/AN5/C2IN- RC1 TTL CMOS PORTC I/O AN5 AN — A/D Channel 5 input C2IN- AN Comparator 2 input RC2/AN6 RC2 TTL CMOS PORTC I/O AN6 AN — A/D Channel 6 input RC3/AN7 RC3 TTL CMOS PORTC I/O AN7 AN — A/D Channel 7 input RC4/C2OUT/TX/CK RC4 TTL CMOS PORTC I/O C2OUT — CMOS Comparator 2 output TX — CMOS USART asynchronous output CK ST CMOS USART asynchronous clock RC5/RX/DT RC5 TTL CMOS Port C I/O RX ST CMOS USART asynchronous input DT ST CMOS USART asynchronous data VSS VSS Power — Ground reference VDD VDD Power — Positive supply Legend: AN = Analog input or output CMOS = CMOS compatible input or output OC = Open collector output TTL = TTL compatible input ST = Schmitt Trigger input with CMOS levels HV = High Voltage XTAL = Crystal DS41203C-page 6 © 2006 Microchip Technology Inc. PIC16F688 2.0 MEMORY ORGANIZATION 2.2 Data Memory Organization The data memory is partitioned into multiple banks, 2.1 Program Memory Organization which contain the General Purpose Registers (GPR) and the Special Function Registers (SFR). Bits RP0 The PIC16F688 has a 13-bit program counter capable and RP1 are bank select bits. of addressing a 4K x 14 program memory space. Only the first 4K x 14 (0000h-01FFF) for the PIC16F688 is RP1 RP0 physically implemented. Accessing a location above 0 0 → Bank 0 is selected these boundaries will cause a wraparound within the first 4K x 14 space. The Reset vector is at 0000h and 0 1 → Bank 1 is selected the interrupt vector is at 0004h (see Figure2-1). 1 0 → Bank 2 is selected 1 1 → Bank 3 is selected FIGURE 2-1: PROGRAM MEMORY MAP Each bank extends up to 7Fh (128 bytes). The lower AND STACK FOR THE locations of each bank are reserved for the Special PIC16F688 Function Registers. Above the Special Function Regis- ters are the General Purpose Registers, implemented PC<12:0> as static RAM. All implemented banks contain Special CALL, RETURN 13 Function Registers. Some frequently used Special RETFIE, RETLW Function Registers from one bank are mirrored in another bank for code reduction and quicker access. Stack Level 1 Stack Level 2 2.2.1 GENERAL PURPOSE REGISTER FILE Stack Level 8 The register file is organized as 256 x 8 in the PIC16F688. Each register is accessed, either directly Reset Vector 0000h or indirectly, through the File Select Register (FSR) (see Section2.4 “Indirect Addressing, INDF and FSR Registers”). 2.2.2 SPECIAL FUNCTION REGISTERS Interrupt Vector 0004h 0005h The Special Function Registers are registers used by the CPU and peripheral functions for controlling the On-chip Program desired operation of the device (see Tables 2-1, 2-2, Memory 2-3 and 2-4). These registers are static RAM. 01FFh The special registers can be classified into two sets: 02000h core and peripheral. The Special Function Registers associated with the “core” are described in this section. Wraps to 0000h-07FFh Those related to the operation of the peripheral 1FFFh features are described in the section of that peripheral feature. © 2006 Microchip Technology Inc. DS41203C-page 7 PIC16F688 FIGURE 2-2: PIC16F688 SPECIAL FUNCTION REGISTERS File File File File Address Address Address Address Indirect addr. (1) 00h Indirect addr. (1) 80h Indirect addr. (1) 100h Indirect addr. (1) 180h TMR0 01h OPTION_REG 81h TMR0 101h OPTION_REG 181h PCL 02h PCL 82h PCL 102h PCL 182h STATUS 03h STATUS 83h STATUS 103h STATUS 183h FSR 04h FSR 84h FSR 104h FSR 184h PORTA 05h TRISA 85h PORTA 105h TRISA 185h 06h 86h 106h 186h PORTC 07h TRISC 87h PORTC 107h TRISC 187h 08h 88h 108h 188h 09h 89h 109h 189h PCLATH 0Ah PCLATH 8Ah PCLATH 10Ah PCLATH 18Ah INTCON 0Bh INTCON 8Bh INTCON 10Bh INTCON 18Bh PIR1 0Ch PIE1 8Ch 10Ch 18Ch 0Dh 8Dh 10Dh 18Dh TMR1L 0Eh PCON 8Eh 10Eh 18Eh TMR1H 0Fh OSCCON 8Fh 10Fh 18Fh T1CON 10h OSCTUNE 90h 110h 190h BAUDCTL 11h ANSEL 91h 111h 191h SPBRGH 12h 92h 112h 192h SPBRG 13h 93h 113h 193h RCREG 14h 94h 114h 194h TXREG 15h WPUA 95h 115h 195h TXSTA 16h IOCA 96h 116h 196h RCSTA 17h EEDATH 97h 117h 197h WDTCON 18h EEADRH 98h 118h 198h CMCON0 19h VRCON 99h 119h 199h CMCON1 1Ah EEDAT 9Ah 11Ah 19Ah 1Bh EEADR 9Bh 11Bh 19Bh 1Ch EECON1 9Ch 11Ch 19Ch 1Dh EECON2(1) 9Dh 11Dh 19Dh ADRESH 1Eh ADRESL 9Eh 11Eh 19Eh ADCON0 1Fh ADCON1 9Fh 11Fh 19Fh 20h A0h 120h 1A0h General General General Purpose Purpose Purpose Register Register Register 80 Bytes 80 Bytes 96 Bytes EFh 16Fh 1EFh accesses F0h accesses 170h accesses 1F0h 7Fh Bank 0 FFh Bank 0 17Fh Bank 0 1FFh Bank 0 Bank 1 Bank 2 Bank 3 Unimplemented data memory locations, read as ‘0’. Note 1: Not a physical register. DS41203C-page 8 © 2006 Microchip Technology Inc.
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