ARM System Developer's Guide

703 Pages·2007·3.27 MB·English

ARM System Developer’s Guide
Designing and Optimizing
System Software
About the Authors
AndrewN.Sloss
AndrewSlossreceivedaB.Sc.inComputerSciencefromtheUniversityofHerefordshire(UK)
in1992andwascertifiedasaCharteredEngineerbytheBritishComputerSociety(C.Eng,MBCS).
He has worked in the computer industry for over 16 years and has been involved with the ARM
processorsince1987. Hehasgainedextensiveexperiencedevelopingawiderangeofapplications
runningontheARMprocessor.HedesignedthefirsteditingsystemsforbothChineseandEgyptian
HieroglyphicsexecutingontheARM2andARM3processorsforEmeraldPublishing(UK).Andrew
SlosshasworkedatARMInc.foroversixyears.HeiscurrentlyaTechnicalSalesEngineeradvising
andsupportingcompaniesdevelopingnewproducts.HeworkswithintheU.S.SalesOrganization
andisbasedinLosGatos,California.
DominicSymes
Dominic Symes is currently a software engineer at ARM Ltd. in Cambridge, England, where
hehasworkedonARM-basedembeddedsoftwaresince1995. HereceivedhisB.A.andD.Phil. in
Mathematics from Oxford University. He first programmed the ARM in 1989 and is particularly
interestedinalgorithmsandoptimizationtechniques.BeforejoiningARM,hewrotecommercialand
publicdomainARMsoftware.
ChrisWright
ChrisWrightbeganhisembeddedsystemscareerintheearly80satLockheedAdvancedMarine
Systems. While at Advanced Marine Systems he wrote small software control systems for use on
theIntel8051familyofmicrocontrollers.HehasspentmuchofhiscareerworkingattheLockheed
PaloAltoResearchLaboratoryandinasoftwaredevelopmentgroupatDowJonesTelerate. Most
recently,ChrisWrightspentseveralyearsintheCustomerSupportgroupatARMInc.,trainingand
supportingpartnercompaniesdevelopingnewARM-basedproducts.ChrisWrightiscurrentlythe
DirectorofCustomerSupportatUltimoduleInc.inSunnyvale,California.
JohnRayfield
JohnRayfield, anindependentconsultant, wasformerlyVicePresidentofMarketing, U.S., at
ARM. In this role he was responsible for setting ARM’s strategic marketing direction in the U.S.,
andidentifyingopportunitiesfornewtechnologiestoservekeymarketsegments.JohnjoinedARM
in1996andheldvariousroleswithinthecompany,includingDirectorofTechnicalMarketingand
R&D,whichwerefocusedaroundnewproduct/technologydevelopment.BeforejoiningARM,John
held several engineering and management roles in the field of digital signal processing, software,
hardware,ASICandsystemdesign.JohnholdsanM.Sc.inSignalProcessingfromtheUniversityof
Surrey(UK)andaB.Sc.Hons.inElectronicEngineeringfromBrunelUniversity(UK).
ARM System
Developer’s Guide
Designing and Optimizing
System Software
Andrew N. Sloss
Dominic Symes
Chris Wright
With a contribution by John Rayfield
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Sloss,AndrewN.
ARMsystemdeveloper’sguide:designingandoptimizingsystemsoftware/AndrewN.
Sloss,DominicSymes,ChrisWright.
p.cm.
Includesbibliographicalreferencesandindex.
ISBN1-55860-874-5(alk.paper)
1.Computersoftware–Development.2.RISCmicroprocessors.3.Computer
architecture.I.Symes,Dominic.II.Wright,Chris,1953-III.Title.
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08 07 06 05 04 5 4 3 2 1
Contents
About the Authors ii
Preface xi
Chapter
1
ARM Embedded Systems
3
1.1 TheRISCDesignPhilosophy 4
1.2 TheARMDesignPhilosophy 5
1.3 EmbeddedSystemHardware 6
1.4 EmbeddedSystemSoftware 12
1.5 Summary 15
Chapter
2
ARM Processor Fundamentals
19
2.1 Registers 21
2.2 CurrentProgramStatusRegister 22
2.3 Pipeline 29
2.4 Exceptions,Interrupts,andtheVectorTable 33
2.5 CoreExtensions 34
2.6 ArchitectureRevisions 37
2.7 ARMProcessorFamilies 38
2.8 Summary 43
Chapter
3
Introduction to the ARM Instruction Set
47
3.1 DataProcessingInstructions 50
3.2 BranchInstructions 58
3.3 Load-StoreInstructions 60
3.4 SoftwareInterruptInstruction 73
3.5 ProgramStatusRegisterInstructions 75
3.6 LoadingConstants 78
3.7 ARMv5EExtensions 79
3.8 ConditionalExecution 82
3.9 Summary 84
v
vi Contents
Chapter
4
Introduction to the Thumb Instruction Set
87
4.1 ThumbRegisterUsage 89
4.2 ARM-ThumbInterworking 90
4.3 OtherBranchInstructions 92
4.4 DataProcessingInstructions 93
4.5 Single-RegisterLoad-StoreInstructions 96
4.6 Multiple-RegisterLoad-StoreInstructions 97
4.7 StackInstructions 98
4.8 SoftwareInterruptInstruction 99
4.9 Summary 100
Chapter
5
Efficient C Programming
103
5.1 OverviewofCCompilersandOptimization 104
5.2 BasicCDataTypes 105
5.3 CLoopingStructures 113
5.4 RegisterAllocation 120
5.5 FunctionCalls 122
5.6 PointerAliasing 127
5.7 StructureArrangement 130
5.8 Bit-fields 133
5.9 UnalignedDataandEndianness 136
5.10 Division 140
5.11 FloatingPoint 149
5.12 InlineFunctionsandInlineAssembly 149
5.13 PortabilityIssues 153
5.14 Summary 155
Chapter
6
Writing and Optimizing ARM Assembly Code
157
6.1 WritingAssemblyCode 158
6.2 ProfilingandCycleCounting 163
6.3 InstructionScheduling 163
6.4 RegisterAllocation 171
6.5 ConditionalExecution 180
6.6 LoopingConstructs 183
6.7 BitManipulation 191
6.8 EfficientSwitches 197
Contents vii
6.9 HandlingUnalignedData 201
6.10 Summary 204
Chapter
7
Optimized Primitives
207
7.1 Double-PrecisionIntegerMultiplication 208
7.2 IntegerNormalizationandCountLeadingZeros 212
7.3 Division 216
7.4 SquareRoots 238
7.5 TranscendentalFunctions:log,exp,sin,cos 241
7.6 EndianReversalandBitOperations 248
7.7 SaturatedandRoundedArithmetic 253
7.8 RandomNumberGeneration 255
7.9 Summary 256
Chapter
8
Digital Signal Processing
259
8.1 RepresentingaDigitalSignal 260
8.2 IntroductiontoDSPontheARM 269
8.3 FIRfilters 280
8.4 IIRFilters 294
8.5 TheDiscreteFourierTransform 303
8.6 Summary 314
Chapter
9
Exception and Interrupt Handling
317
9.1 ExceptionHandling 318
9.2 Interrupts 324
9.3 InterruptHandlingSchemes 333
9.4 Summary 364
Chapter
10
Firmware
367
10.1 FirmwareandBootloader 367
10.2 Example:Sandstone 372
10.3 Summary 379
viii Contents
Chapter
11
Embedded Operating Systems
381
11.1 FundamentalComponents 381
11.2 Example:SimpleLittleOperatingSystem 383
11.3 Summary 400
Chapter
12
Caches
403
12.1 TheMemoryHierarchyandCacheMemory 404
12.2 CacheArchitecture 408
12.3 CachePolicy 418
12.4 Coprocessor15andCaches 423
12.5 FlushingandCleaningCacheMemory 423
12.6 CacheLockdown 443
12.7 CachesandSoftwarePerformance 456
12.8 Summary 457
Chapter
13
Memory Protection Units
461
13.1 ProtectedRegions 463
13.2 InitializingtheMPU,Caches,andWriteBuffer 465
13.3 DemonstrationofanMPUsystem 478
13.4 Summary 487
Chapter
14
Memory Management Units
491
14.1 MovingfromanMPUtoanMMU 492
14.2 HowVirtualMemoryWorks 493
14.3 DetailsoftheARMMMU 501
14.4 PageTables 501
14.5 TheTranslationLookasideBuffer 506
14.6 DomainsandMemoryAccessPermission 510
14.7 TheCachesandWriteBuffer 512
14.8 Coprocessor15andMMUConfiguration 513
14.9 TheFastContextSwitchExtension 515
14.10 Demonstration:ASmallVirtualMemorySystem 520
14.11 TheDemonstrationasmmuSLOS 545
14.12 Summary 545
Contents ix
Chapter
15
The Future of the Architecture
by John Rayfield
549
15.1 AdvancedDSPandSIMDSupportinARMv6 550
15.2 SystemandMultiprocessorSupportAdditionstoARMv6 560
15.3 ARMv6Implementations 563
15.4 FutureTechnologiesbeyondARMv6 563
15.5 Summary 566
Appendix
A
ARM and Thumb Assembler Instructions
569
A.1 UsingThisAppendix 569
A.2 Syntax 570
A.3 AlphabeticalListofARMandThumbInstructions 573
A.4 ARMAssemblerQuickReference 620
A.5 GNUAssemblerQuickReference 631
Appendix
B
ARM and Thumb Instruction Encodings
637
B.1 ARMInstructionSetEncodings 637
B.2 ThumbInstructionSetEncodings 638
B.3 ProgramStatusRegisters 645
Appendix
C
Processors and Architecture
647
C.1 ARMNamingConvention 647
C.2 CoreandArchitectures 647
Appendix
D
Instruction Cycle Timings
651
D.1 UsingtheInstructionCycleTimingTables 651
D.2 ARM7TDMIInstructionCycleTimings 653
D.3 ARM9TDMIInstructionCycleTimings 654
D.4 StrongARM1InstructionCycleTimings 655
D.5 ARM9EInstructionCycleTimings 656
D.6 ARM10EInstructionCycleTimings 658
D.7 IntelXScaleInstructionCycleTimings 659
D.8 ARM11CycleTimings 661