ARISTOTLE UNIVERSITY OF THESSALONIKI - The Federal

517 Pages·2011·17.86 MB·English

ARISTOTLE UNIVERSITY OF THESSALONIKI

SCHOOL OF ENGINEERING

DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING

DOCTORAL DISSERTATION

Development of New Model-Based Adaptive Predictive Control Algorithms and
Their Implementation on Real-Time Embedded Systems

Vincent Andrew Akpan
B.Sc. (Physics), M. Tech. (Instrumentation)

Supervisor: Professor George Hassapis

THESSALONIKI, GREECE, 2011.
Development of New Model-Based Adaptive Predictive Control Algorithms and
Their Implementation on Real-Time Embedded Systems

Doctoral Dissertation

Vincent Andrew Akpan

Examination Committee:
George Hassapis, Professor, Department of Electrical and Computer Engineering, School of Engineering,
Aristotle University of Thessaloniki, T.K. 54124 Thessaloniki, Greece.

Alkiviadis Hatzopoulos, Professor, Department of Electrical and Computer Engineering, School of Engineering,
Aristotle University of Thessaloniki, T.K. 54124 Thessaloniki, Greece.

Loukas Petrou, Associate Professor, Department of Electrical and Computer Engineering, School of Engineering,
Aristotle University of Thessaloniki, T.K. 54124 Thessaloniki, Greece.

Vasilios Petridis, Professor, Department of Electrical and Computer Engineering, School of Engineering,
Aristotle University of Thessaloniki, T.K. 54124 Thessaloniki, Greece.

Zoe Doulgeri, Professor, Department of Electrical and Computer Engineering, School of Engineering, Aristotle
University of Thessaloniki, T.K. 54124 Thessaloniki, Greece.

John Theocharis, Professor, Department of Electrical and Computer Engineering, School of Engineering,
Aristotle University of Thessaloniki, T.K. 54124 Thessaloniki, Greece.

Olga Kosmidou, Associate Professor, Department of Electrical and Computer Engineering, School of
Engineering, Democritus University of Thrace, T.K. 67100 Xanthi, Greece.
Abstract
ABSTRACT
This dissertation deals with the development of two new neural network-based model identification
algorithms and two new model predictive control (MPC) algorithms which are combined to form model-based
adaptive control strategies. Also, two new computer platforms for the implementation of these algorithms and
their corresponding strategies are proposed. The overall strategies consist of an online model identification part
and a model-based predictive control part. The proposed algorithms for the model identification are practically
two new algorithms for training a dynamic feedforward neural network (DFNN) which will be considered to
comprise the model of a nonlinear dynamic system. The proposed training algorithms are: the adaptive recursive
least squares (ARLS) algorithm and the modified Levenberg-Marquardt algorithm (MLMA). The proposed
algorithms for the predictive control parts are: the adaptive generalized predictive control (AGPC) and the
nonlinear adaptive model predictive control (NAMPC). The two real-time platforms for the implementation of the
combined operation of identification and predictive control algorithms with the purpose of forming an adaptive
control strategy are: a service-oriented architecture (SOA) cluster network based on the device profile for web
services (DPWS) and a Xilinx’s Virtex-5 FPGA (field programmable gate array) development board.
The proposed control strategies have been applied to control three applications, namely: the fluidized bed
furnace reactor (FBFR) of the steam deactivation unit (SDU) used for preparing catalyst for evaluation in a fluid
catalytic cracking (FCC) pilot plant; an activated sludge wastewater treatment plant (AS-WWTP) in accordance
with the European wastewater treatment standards; and the auto-pilot control unit of a nonlinear F-16 fighter
aircraft. The neural network models for these three applications were validated using one-step, five-step and ten-
step ahead prediction simulations as well as with the Akaike’s final prediction error (AFPE) estimate algorithm.
Also, the performances of the proposed ARLS and MLMA algorithms were compared with the backprogation
with momentum (BPM) and incremental backpropagation (INCBP) algorithms. Also the performances of the PID
control of the identified model of the FBFR process by means of the ARLS and the MLMA network training
algorithms versus the PID control of the first principles model of the same process.
The AGPC and NAMPC control of the considered applications when model identification is performed
by the ARLS and MLMA algorithms were implemented on a conventional mulitcore personal computer (PC) and
SOA cluster of muticore PCs. Hardware-in-the-loop simulations have been performed by linking the PC or SOA
implementations with MATLAB simulations of the processes. An AGPC implementation with neural networks
trained using the MLMA algorithm has been made on a Xilinx Virtex-5 FPGA.
The hardware-in-the-loop simulations have shown that the proposed algorithms and their SOA or FPGA
implementations can have execution times shorter than other algorithms which present similar performance.
Therefore, they render themselves more appropriate compared to other algorithms for use in the control of
processes requiring shorter sampling time for stable operations.
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Acknowledgement
ACKNOWLEDGEMENT
My sincere appreciation and gratitude goes to my project supervisor, Professor George Hassapis, who conceived
and supervised the work contained in this dissertation. I also thank him for his technical and financial supports,
encouragements and fatherly roles throughout the course of this work. I will always remain grateful to him for his
advice, suggestions, intuitive comments, patience and untiring efforts in reading through my manuscripts with
necessary corrections from conception through algorithm developments, problem formulations, implementations,
and several simulations and analyses which have resulted in this dissertation.

I also thank Professor Alkiviadis Hatzopoulos and Associate Professor Loukas Petrou for their co-supervisory
roles in this work. My sincere thanks to Associate Professor Loukas Petrou for his technical supports and
comments as well as his efforts and time devoted to this work from inception to completion.

I specially acknowledge and thank the Greek State Scholarships’ Foundation (I.K.Y.) that provided the
scholarship as well as the major funding for this research. I also thank the Federal Government of Nigeria for their
financial support towards the Bilateral Educational Agreement with I.K.Y. and the Federal University of
Technology, Akure – Nigeria for their financial supports which has made this scholarship a reality leading to the
successful completion of my doctorate degree programme. My acknowledgment also goes to Ambassador of
Nigeria to Greece, His Excellency (Dr.) Etim U. Uyie for his love, care and financial assistance.

My special thanks go to the Staff of the School of Electrical and Computer Engineering, AUTH, Greece. I
gratefully acknowledge Dr. Simeonidis Andreas for his comments and encouragements, and to Mr. George
Voukalis for his technical assistance. I also wish to thank my colleagues at the Laboratory of Computer Systems
Architecture: Maria Koukourli, Ioakeim Samaras, Babis Serenis, Manos Tsardoulias and Nikos Sismanis for their
technical support, comments and contributions towards the successful completion of this project.

I am highly indebted to my mother Mrs. Cecilia Andrew Akpan; my mother-in-law Mrs. Titilayo Nathaniel
Oyewo, and my siblings Justine, Sylvester, Emmanuel and Justina for their sacrifices and prayers.

Words are not enough to thank my wife, Mrs. Rachael Oyenike Vincent–Akpan, for all her sacrifices, financial
support, prayers, and encouragements throughout the period of this study. Just know that I love you.

Finally, I am most grateful to God Almighty for His infinite mercy, divine grace and sound health.

Vincent Andrew Akpan
July, 2011.
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Table of Contents
TABLE OF CONTENTS
CONTENTS PAGES
Abstract i
Acknowledgement ii
Table of Contents iii
List of Figures xiii
List of Tables xxiii
List of Acronyms xxv

Chapter 1 Introduction 1
1.1 Introduction 1
1.2 Research Objectives 3
1.3 Scientific Contributions 4
1.4 Thesis Organization and Structure 6
1.5 Scientific Publications 7

Chapter 2 Background of the Research 9
2.1 Introduction 9
2.2 Model Predictive Control (MPC) 11
2.2.1 Historical Background of MPC 11
2.2.2 Overview of MPC Strategy 12
2.3 MPC Process Models 15
2.4 Neural Networks: An Overview 18
2.4.1 Neural Networks 18
2.4.2 Multilayer Perceptron (MLP) Neural Networks 19
2.4.3 Supervised and Unsupervised Learning Methods Using Neural Networks 20
2.4.3.1 Dynamic Neural Networks for Supervised Learning 21
2.4.3.1.1 Dynamic Feedforward Multilayer Perceptron Neural Networks (DFNN) 21
2.4.3.1.2 Recurrent Neural Networks (RNN) 22
2.4.3.1.2.1 The Hopfield Network 23
2.4.3.1.2.2 The Jordan Network 25
2.4.3.1.2.3 The Elman Network 26
2.4.3.1.3 Tapped Delay Neural Networks 27
2.4.3.2 Neural Networks Based on Unsupervised Learning 28
2.4.3.2.1 Generalized Regression Neural Network (GRNN) 30
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2.4.3.2.2 Radial Basis Function Neural Network (RBFNN) 31
2.4.4 Basic Neural Networks Training Algorithms 34
2.4.4.1 The Backpropagation (BP) Algorithm with Momentum 34
2.4.4.2 Teacher-Forced Real-Time Recurrent Learning (RTRL) Algorithm 39
2.5 System Description and Neural Network-Based Nonlinear Model Predictors 42
2.5.1 General System Description and mathematical Notations 42
2.5.1.1 Remarks on the Disturbance Model 44
2.5.2 The Neural Network-Based Nonlinear Model Predictors 45
2.5.2.1 Neural Network-Based Auto-Regressive with Exogenous Inputs (NNARX)
Model Predictor 46
2.5.2.2 Neural Network-Based Auto-Regressive with Moving Average and Exogenous
Inputs (NNARMAX) Model Predictor 46
2.5.2.3 Neural Network-Based Output–Error (NNOE) Model Predictor 47
2.6 Implementation of MPC Algorithms 48
2.6.1 Computer Implementation of MPC Algorithms 48
2.6.2 FPGA Implementation of MPC Algorithms 49
2.6.3 Remarks on the Reviewed MPC Implementation Strategies 50
2.7 Switched Ethernet Architecture and Service Oriented Architecture (SOA) Technologies 51
2.7.1 The Architecture of the Switched Ethernet 51
2.7.2 SOA Technologies 52
2.7.2.1 The Jini Technology 52
2.7.2 2.The UPnP Technology 52
2.7.2.3 The DPWS Technology 52
2.8 Programmable Logic Devices and Field Programmable Gate Array (FPGA) Technologies 53
2.8.1 The Xilinx Virtex Series FPGA Family Members 55
2.8.2 Comparison of the Xilinx General-Purpose, Defense-Grade, Space-Grade Virtex-4
and Virtex-5 FPGA Product Family Members 57
2.8.3 The Xilinx Virtex-5 XC5VFX70T ML507 FPGA Development Board 59
2.9 Application of MPC 61
2.10 Practical Problems with MPC Algorithms 63
2.11 Neural Network-Based Control Schemes and MPC 64
2.11.1 Direct Adaptive Control 65
2.11.1.1 Direct Inverse Control with Generalized Training 66
2.11.1.2 Direct Inverse Control with Specialized Training 66
2.11.1.3 Indirect Inverse Control 66
2.11.1.4 Internal Model Control (IMC) 66
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2.11.1.5 Feedback Linearization 67
2.11.1.6 Feedforward Control 68
2.11.1.7 Optimal Control 68
2.11.2 Indirect Adaptive Control 69
2.11.2.1 Indirect Adaptive Control Based on Instantaneous Linearization 70
2.11.2.2 Nonlinear Predictive Control (NPC) 72
2.11.3 Modular Neural Network (MNN) Controller Design 73
2.11.4 Back-Propagation Through Time (BPTT) Control Scheme 73
2.11.5 Neural Network-Based Adaptive Critic Designs (ACD) 74
2.12 State-of-the-Art in Neural Network-Based MPC: Neural Network Training, Model
Identification, Adaptive Control and MPC Implementation 75
2.12.1 Neural Network and Training Methods 76
2.12.2 Neural Network Model Identification for MPC Design 77
2.12.3 Neural Network–Based MPC Algorithms 80
2.12.4 MPC Implementation 82

Chapter 3 Neural Network-Based Nonlinear Model Identification Algorithms 87
3.1 Introduction 87
3.2 Dynamic Neural Network Model Identification 88
3.2.1 Parallel Model Identification 88
3.2.2 Series-Parallel Model Identification 89
3.2.3 Remarks on the Basic Neural Network Training Algorithms 89
3.2.3.1 Backpropagation Algorithms and Its Variations 89
3.2.3.2 Teacher-Forced Real-Time Recurrent Learning 90
3.2.4 The Architecture for the Teacher-Forced Dynamic Feedforward Neural Network 91
3.3 Training Algorithms for Neural Network Model Identification 92
3.3.1 Formulation of the Model Identification Problem 92
3.3.2 The Proposed Neural Network Model Identification Schemes 94
3.3.3 Backpropagation (BP) Techniques 97
3.3.4 The Gauss-Newton Second-Order Approximation Method 97
3.3.4.1 Computing the Gradient of the Network ψ[k,θ(k)] 98
3.3.4.2 Computing the Partial Derivatives φ(k) 100
3.3.4.3 Second-Order Expansion and the Gauss-Newton Search Direction 102
3.3.5 The Adaptive Recursive Least Squares (ARLS) Algorithm 103
3.3.6 The Modified Levenberg-Marquardt Algorithm (MLMA) 108
3.3.7 Training Parameters and Criteria for Evaluating the Neural Network (NN) Model 113
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3.3.8 Scaling the Training Data and Rescaling the Trained Network 114
3.4 Neural Network-Based Validation Algorithms 115
3.4.1 One-Step Ahead Prediction Validation 115
3.4.2 k-Step Ahead Prediction Validation 116
3.4.3 Akaike’s Final Prediction Error Estimate 116

Chapter 4 Neural Network-Based Adaptive Model Predictive Control Algorithms 118
4.1 Introduction 118
4.2 The Objective Function 119
4.3 Adaptive Generalized Predictive Control (AGPC) Algorithm 120
4.3.1 Instantaneous Linearization of a Deterministic Nonlinear Neural Network ARX Model 121
4.3.2 Instantaneous Linearization of a Stochastic Nonlinear Neural Network ARMAX Model 122
4.3.3 The AGPC Algorithm 124
4.4 Nonlinear Adaptive Model Predictive Control (NAMPC) Algorithm 129
4.5 Tuning the Neural Network-Based Model Predictive Controllers 139

Chapter 5 Development of Real-Time Implementation Platforms for the Neural
Network-Based Nonlinear Model Identification and Adaptive Model
Predictive Control Algorithms 141
5.1 Introduction 141
5.2 The Description of the Proposed Network Control System (NCS) 142
5.2.1 Bounded Transmission Delay 142
5.2.2 Interoperability at the Application Level 145
5.3 The Development of Real-Time Embedded Processor System Platform 146
5.3.1 Overview of Embedded Processor Systems and Design Considerations 146
5.3.1.1 Why Embedding a Processor Inside an FPGA? 146
5.3.1.2 Some Advantages and Disadvantages of FPGA Embedded Processor System 147
5.3.1.3 Xilinx’s Embedded Hard PowerPC™440 and MicroBlaze Soft Processors 148
5.3.1.4 Standard Industry Benchmark for FPGA Embedded Processors and Xilinx’s FPGA
Embedded Processors Benchmark Performances 149
5.3.1.5 Design Considerations for the Proposed FPGA Embedded Processor System 149
5.3.1.5.1 Compiler Optimization and Parameters 150
5.3.1.5.2 Memory Types 150
5.3.1.5.3 Optimization Specific to an FPGA Embedded Processor 152
5.3.2 The PowerPC™ 440 Embedded Processor System Development Using Xilinx Integrated
Software Environment (ISE) and Xilinx Platform Studio (XPS) 153
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5.3.3 MicroBlaze Embedded Processor System Development Using the Xilinx Integrated
Software Environment (ISE) and the Xilinx Platform Studio (XPS) 161
5.3.4 Software Development and Performance Verification of the PowerPC™440 and
MicroBlaze™ Embedded Processor Systems Using the Xilinx Software Development
Kit (Xilinx SDK) 164
5.3.5 MicroBlaze™ Dhrystone Benchmark Performance Evaluation 167
5.3.6 Comparison of the Device Utilization for the PowerPC™440 and MicroBlaze™ Embedded
Processor Systems 169

Chapter 6 Case Studies and Simulation Results 171
6.1 Introduction 171
6.2 The Model Identification and Control of the Fluidized Bed Furnace Reactor (FBFR) Process 173
6.2.1 The Fluidized Bed Furnace Reactor (FBFR) Process Description and Mathematical Model 173
6.2.1.1 The Fluidized Bed Furnace Reactor (FBFR) Process 174
6.2.1.2 The Control Problem of the Fluidized Bed Furnace Reactor (FBFR) Process 176
6.2.1.3 FBFR Experiment and Training Data Acquisition 177
6.2.1.4 Statement of the FBFR Neural Network Model Identification and Control Problem 177
6.2.2 Training the Neural Network that Models the FBFR Process 179
6.2.2.1 Validating the Trained Network that Models the FBFR Process 181
6.2.2.1.1 Validation by the One-Step Ahead Predictions Simulation 182
6.2.2.1.2 K-Step Ahead Prediction Simulations for the FBFR Process 182
6.2.2.1.3 The Akaike’s Final Prediction Error (AFPE) Estimates for the FBFR Process 184
6.2.2.2 Online Closed-Loop Identification with PID Control 185
6.2.3 Validation and Dynamic Performance Comparison of the Proposed MLMA algorithm
with Backpropagation with momentum (BPM) and Incremental Backpropagation
(INCBP) Algorithms 189
6.2.3.1 Network Training Using BPM, INCBP and the Proposed MLMA Algorithms 190
6.2.3.2 Validating the Trained Network by BPM, INCBP and MLMA Algorithms 191
6.2.3.2.1 One-Step Ahead Predictions Simulation for the FBFR Process 192
6.2.3.2.2 K-Step Ahead Prediction Simulations for the FBFR Process 195
6.2.3.2.3 The Akaike’s Final Prediction Error (AFPE) Estimates for the FBFR Process 196
6.2.3.3 Performance Comparison of the BPM, INCBP and the MLMA Algorithms 196
6.2.4 Validation and Performance Evaluation of the Proposed AGPC and NAMPC Algorithms
for the Model-Based Adaptive MPC of the FBFR Process 197
6.2.4.1 Comparison of Simulation Results for the Control Performance of AGPC and
NAMPC for the FBFR Process Identification and Control 199
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6.2.4.2 Computation Time for the Neural Network Identification and Control of the FBFR
Process 201
6.2.5 Implementation of the PID and NAMPC algorithms Over the Service-Oriented Architecture
Cluster Network and their Performance Evaluation 201
6.2.5.1 Results of the Closed-Loop Simulation 204
6.2.5.2 Worst Case Overall Control Loop Delay Introduced by a DPWS-Based Traditional
Ethernet Network 207
6.2.5.3 Worst Case Overall Control Loop Delay Introduced by the Proposed Service-Oriented
Architecture (SOA) Cluster Network Based on the DPWS 208
6.3 Activated Sludge Wastewater Treatment Plant (AS-WWTP) 210
6.3.1 An Overview of the AS-WWTP Process 210
6.3.1.1 Statement of the Activated Sludge Wastewater Treatment Plant (AS-WWTP) Problem 210
6.3.1.2 Statement of the Activated Sludge Wastewater Treatment Plant (AS-WWTP) Neural
Network Model Identification and Control Problem 213
6.3.1.3 Experiment with the BSM1 for AS-WWTP Process Neural Network Training Data
Acquisition 215
6.3.2 Training the Neural Network that Models the AS-WWTP Aerobic Reactor 215
6.3.2.1 Validating the Trained Network that Models the AS-WWTP Process 217
6.3.3.2.1 Validation by the One-Step Ahead Predictions Simulation 217
6.3.3.2.2 K-Step Ahead Prediction Simulations for the AS-WWTP Process 220
6.3.3.2.3 Akaike’s Final Prediction Error (AFPE) Estimates for the AS-WWTP Process 221
6.3.2.2 Online Closed-Loop Identification and Control with AGPC Controller 221
6.3.3 Validation and Dynamic Performance Comparison of the BPM, INCBP and Proposed
ARLS Algorithms for the Model Identification of the Aerobic Reactor of the AS-WWTP
Process 224
6.3.3.1 Network Training Using the BPM, INCBP and the Proposed ARLS Algorithms 224
6.3.3.2 Validating the Trained Network by BPM, INCBP and MLMA Algorithms 226
6.3.3.2.1 One-Step Ahead Predictions Simulation for the AS-WWTP Process 227
6.3.3.2.2 K-Step Ahead Prediction Simulations for the AS-WWTP Process 230
6.3.3.2.3 The Akaike’s Final Prediction Error (AFPE) Estimates for the AS-WWTP
Neural Network Model 230
6.2.3.3 Performance Comparison of the BPM, INCBP and the MLMA Algorithms 230
6.3.4 Validation and Performance Evaluation of the Proposed AGPC and NAMPC Algorithms for
Model-Based Adaptive Control of the AS-WWTP Process 231
6.3.4.1 Comparison of Simulation Results for the Control Performance of AGPC and
NAMPC for the AS-WWTP Process Identification and Control 232
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