Analog Layout Synthesis: a Survey of Topological Approaches

312 Pages·5.803 MB·English

by  Graeb, Helmut E(Editor)

Analog Layout Synthesis

Helmut E. Graeb
Editor
Analog Layout Synthesis
A Survey of Topological Approaches
123
Editor
HelmutE.Graeb
TechnischeUniversita¨tMu¨nchen
Munich
Germany
[email protected]
ISBN978-1-4419-6931-6 e-ISBN978-1-4419-6932-3
DOI10.1007/978-1-4419-6932-3
SpringerNewYorkDordrechtHeidelbergLondon
LibraryofCongressControlNumber:2010935721

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Preface
Analogcomponentsappearon75%ofallchips,andcause40%ofthedesigneffort
and50%ofthedesignerrorsdetectedafterfirstsiliconmeasurements,reportedEDA
WeeklyonMarch21,2005.Duetoincreasingfunctionalcomplexityofsystem-on-
chips, the difficulties in analog design and the lack of design automation support
for analogcircuitscontinuallyincrease the bottleneckcharacter of analogcompo-
nentsinchipdesign.Designmethodologyanddesignautomationforanalogcircuits
thereforeisacrucialproblemforfuturesystem-on-chips.
Eminentlycriticalisthelayoutsynthesispartoftheanalogdesignflow.Although
there have been a lot of very good works from universities over the years, some
ofwhichevenfoundtheirwayto commercialEDAtools,industrialapplicationof
analoglayoutsynthesisisstillinitsinfancywhenitiscomparedtoitsdigitalcoun-
terpart!TheindustrialpointofviewevensaysthatpracticableEDAtoolsforanalog
layoutsynthesisdidnotexist.
Butitseemsthatthissituationisabouttochange.Inthefaceofincreasingcir-
cuit complexity and high performanceSoC designs, the once-sleepy analog EDA
market is experiencing an increasing shift from single vendor solutions to design
toolintegrationviaalliancesbetweenmanyplayers.Theattempttocreateaninter-
platformreference,such as the InteroperablePDK Libraries(IPL)alliance, where
analoglayoutsmadewithatoolcanbeimportederror-freetodifferentframeworks,
isanexample.ManyEDAstart-upsaswellasmajorleadersarealreadyannounc-
ing key automated layout tools for the analog designer intended to boost his/her
productivity.
Inthisexcitingscenario,academiacontinuestostrivefornew,moreefficient,and
complementaryapproachesto this task and to the existing tools, and has recently
producedsome veryinteresting new solutions. The intentionof this bookhas two
parts.Ontheonehand,itsummarizesandpresentstheselatestresults.Ontheother
hand,itisdedicatedtogiveanintroductiontoadvancedanaloglayoutmethodson
thegraduatelevel.
The book is structured in three parts. The first part with three chapters covers
recentapproachestotopologicalplacementofanalogcircuits.Thesecondparttreats
theproblemofrouting.Thethirdpartwiththreemorechaptersdealswithlayoutin
the design flow, namely, with the problem of retargeting an existing layout for a
new technology,with integrating layout in the sizing process, and with constraint
managementinthedesignflow.
v
vi Preface
Thefirstchapterstartswithanintroductiontothedifferentwaysofapproaching
in CAD tools device-level placement problems for analog layout. It is elaborated
how the structural representation of the layout in the algorithm is crucial for the
efficiencyandefficacyoftheplacementprocess.Besidestheclassicalwayofusing
absolutecoordinatesforthe moduleplacementandslicing structuresfortopologi-
calrepresentations,whichencodetherelativepositioningbetweencells,itdescribes
howthe sequence-pairandtree-basedtopologicalrepresentationcan beappliedto
dramaticallyreducethesearchspacetothetinyfraction,whichsatisfiestheinherent
symmetryconstraintsinanalogcircuits.Itfurtherdevelopssufficientconditionsto
ensurethesymmetryconstraintsduringthesuccessivemovesofaplacementalgo-
rithmand,basedontheseideas,presentsseveraltopologicalalgorithmsthatperform
theexplorationprocessveryefficiently.
Thesecondchapterfurtherstheideaspresentedinthe firstchapterandextends
themtoahierarchicalmoduleclustering.Theanalogdevicescanbehierarchically
clusteredintogroupsaccordingtomodels,circuitfunctionalities,orsignal/current
flows. Following the B*-tree, a hierarchical B*-tree (HB*-tree) placement repre-
sentationisdevelopedtomodelthiscircuithierarchyandsymmetryandproximity
constraintsamongmodulesand acrossthe hierarchy.Thishierarchicalrepresenta-
tionisfedintoaplacementalgorithmtogenerateoptimumdeviceplacementsthat
meetalldevicelayoutconstraints.Performingasimulatedannealingalgorithm,the
placementof the device modulesin differentdevice groupsbelongingto different
clusteringhierarchiesissimultaneouslyoptimized.
The third chapter first introduces a method to automatically derive the circuit
hierarchyand the resulting symmetry,proximity,and matchingconstraintsfrom a
netlist.Adeterministicalgorithmisthenpresentedthatcomputestheshapefunction
ofdifferentaspectratiosofthecircuitplacementbyarecursivebottom-upapproach
through the derived circuit hierarchy starting from basic modules such as current
mirrors or differentialpairs. For each hierarchylevel, the shape function is deter-
minedbycombiningtheplacementsofthenext-lowerhierarchy.Thesearestoredas
so-calledenhancedshapefunctionsthatincludethecorrespondingB*-treesofeach
individual shape. Algorithms are proposed to generate the vertical and horizontal
sumoftwoB*-Treesofplacementswhileprovablycomplyingwiththeconstraints.
As the algorithm bounds the enumeration according to the circuit hierarchy and
theconstraints,itgeneratesresultsveryfast,whilebeingdeterministicwithoutany
tuningparameter.
The second part of the book deals with analog routing. It gives a tutorial on
routingmethodsandcorrespondingplacementandroutingrepresentations,includ-
ingconstraints,forinstance,forsymmetryorcrosstalk.Areviewofdifferentrouting
strategiesandthecorrespondingstateoftheartfollows.Earlyroutingapproachesin-
spiredfromdigitaldesign,cost-drivenapproaches,andparasitic-drivenapproaches
(including,e.g.,performancesensitivities),aswellastheA*algorithmarecovered.
The connection to placement through templates and other integration approaches
is discussed afterward. Then, the partitioning of routing into global and detailed
routing, as in digital design, is described. The chapter concludes with specialized
routingapproachesforRFcircuitsandanalogarrays.
Preface vii
Thethirdpartofthebookaddressesanaloglayoutissuesarisingfromtheambient
designflow.
In Chap.5, the task of retargeting an existing layout, including placement and
routing, is examined. Specific algorithms for layout retargetingmay be beneficial
if the involved layout modifications are moderate or to extract and conserve the
knowledgecontainedinalayout.Afterashortintroductiontothepreparatorysteps
oflayer mapping,constraintgenerationanddevicerecognition,themain algorith-
micstepofretargeting,i.e.,layoutcompaction,isdescribedindetail.Basedonthe
linearprogrammingapproachtoitssolution,agraph-basedsimplexmethodispre-
sented with full details. The different types of constraints, the complexity of the
algorithm,andpracticalissuesarediscussedaswell.
Chapter 6 is dedicated to the problemof integratinglayouteffectsinto the cir-
cuitsizingprocess,toavoidunnecessaryiterationsbetweenelectricalandphysical
synthesisasmuchaspossible.Thishasbeencalledparasitic-awaresynthesis.This
chapterreachesfromtheverybasics(whatisit,andwhyandwhenisitreallynec-
essary) to a practical implementation of this type of synthesis process. Different
methods to carry it out as well as their pros, cons, and trade-offs (mainly effi-
ciency vs. completiontime) will be explained. A technique will be presented that
usesacombinationofsimulation-basedoptimization,procedurallayoutgeneration,
exhaustive geometric evaluation algorithms, and several mechanisms for parasitic
estimation, to comprehensivelyincorporate the layout-inducedparasitic into elec-
tricalsynthesis.
Chapter7concludesthebookwithadiscussionofthemanagementofthecrucial
factor in analog layout — the constraints. It provides a problem formulation for
theclassification,representation,transformation,andverificationofconstraintsina
top-downdesignflow,aswellasaformulationofaconstraintengineeringsystem,
includingitsimpactonthedesignflowanditsalgorithms.
This bow from placementto routing to the design flow, drawn by the structure
ofthebook,invitesthereadertostartfromthebeginningandreadonechapterafter
theother.Atthesametime,thechaptersareself-containedandmaybeaccessedin-
dividuallyandindependently.Inanywaysheorheapproachesthebook,thereader
willgainadeepinsightintothetasksofanaloglayoutandintotheactualsolution
approaches.
Munich HelmutGraeb
March2010

The Authors
HazemAbbas (Hazem [email protected])receivedtheB.Sc.andM.Sc.degrees
in 1983 and 1988, respectively, from Ain Shams University, Egypt and the Ph.D.
degreein 1993fromQueen’sUniversity at Kingston,Canada all in Electricaland
ComputerEngineering.HeheldapostdocpositionatQueen’sUniversityin1993.In
1995,heworkedasResearchFellowattheRoyalMilitaryCollegeatKingstonand
then joined the IBM Toronto Lab as a Research Associate. He joined the Depart-
mentofElectricalandComputerEngineeringatQueen’sUniversityasanAdjunct
Assistant Professor in 1997–1998.He is now with the Department of Computers
andSystemsEngineeringatAinShamsUniversity,Egypt,asaProfessoronCom-
puter and Systems Engineering.Dr. Abbas is also working with Mentor Graphics
Inc., Egypt as a Senior EngineeringManager. His research interests are in the ar-
easofneuralnetworks,patternrecognition,evolutionarycomputations,andimage
processingandtheirparallelandmulticoreimplementations.Healsoservesasthe
PresidentoftheIEEESignalProcessingChapterinCairo.
Florin Balasa ([email protected]) received the Ph.D. degree in computer science
fromthePolytechnicalUniversityofBucharest,Bucharest,Romania,in1994,and
thePh.D.degreeinelectricalengineeringfromtheKatholiekeUniversiteitLeuven,
Leuven,Belgium,in1995.
From 1990 to 1995, he was with the Interuniversity Microelectronics Center
(IMEC), Leuven,Belgium. From 1995 to 2000,he was a Senior Design Automa-
tionEngineerattheAdvancedTechnologyDivisionofConexantSystems(formerly
RockwellSemiconductorSystems),NewportBeach,CA.HeiscurrentlyanAsso-
ciateProfessorofComputerScienceattheSouthernUtahUniversity.
Dr. Balasa was a recipient of the US National Science Foundation CAREER
Award.
Rafael Castro-Lo´pez ([email protected]) received the “Licenciado en
F´ısica Electro´nica” degree (M.S. degree on Electronic Physics) and the “Doctor
enCienciasF´ısicas” (Ph.D.degree)fromtheUniversityofSeville,Spain,in 1998
and2005,respectively.Since1998,hehasbeenworkingattheInstituteofMicro-
electronicsofSeville(CSIC-IMSE-CNM)oftheSpanishMicroelectronicsCenter,
where he now holds the position of Tenured Scientist. His research interests lie
in the field of integrated circuits, especially design and computer-aided design
ix