Analog Circuit Design for Process Variation-Resilient Systems-on-a-Chip

183 Pages·2012·5.51 MB·English

by  Marvin Onabajo

Analog Circuit Design for Process
Variation-Resilient Systems-on-a-Chip
Marvin Onabajo Jose Silva-Martinez
•
Analog Circuit
Design for Process
Variation-Resilient
Systems-on-a-Chip
123
Marvin Onabajo JoseSilva-Martinez
Department of Electricaland Department of Electricaland
Computer Engineering Computer Engineering
409Dana Research Center Texas A&MUniversity
Northeastern University 111A ZachryEngineeringBuilding
360HuntingtonAvenue College Station
Boston,MA 02115 TX 77843-3128
USA USA
ISBN 978-1-4614-2295-2 e-ISBN978-1-4614-2296-9
DOI 10.1007/978-1-4614-2296-9
SpringerNewYorkHeidelbergDordrechtLondon
LibraryofCongressControlNumber:2012932403
(cid:2)SpringerScience+BusinessMediaNewYork2012
Thisworkissubjecttocopyright.AllrightsarereservedbythePublisher,whetherthewholeorpartof
the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations,
recitation,broadcasting,reproductiononmicrofilmsorinanyotherphysicalway,andtransmissionor
informationstorageandretrieval,electronicadaptation,computersoftware,orbysimilarordissimilar
methodology now known or hereafter developed. Exempted from this legal reservation are brief
excerpts in connection with reviews or scholarly analysis or material supplied specifically for the
purposeofbeingenteredandexecutedonacomputersystem,forexclusiveusebythepurchaserofthe
work. Duplication of this publication or parts thereof is permitted only under the provisions of
theCopyrightLawofthePublisher’slocation,initscurrentversion,andpermissionforusemustalways
beobtainedfromSpringer.PermissionsforusemaybeobtainedthroughRightsLinkattheCopyright
ClearanceCenter.ViolationsareliabletoprosecutionundertherespectiveCopyrightLaw.
The use of general descriptive names, registered names, trademarks, service marks, etc. in this
publicationdoesnotimply,evenintheabsenceofaspecificstatement,thatsuchnamesareexempt
fromtherelevantprotectivelawsandregulationsandthereforefreeforgeneraluse.
While the advice and information in this book are believed to be true and accurate at the date of
publication,neithertheauthorsnortheeditorsnorthepublishercanacceptanylegalresponsibilityfor
anyerrorsoromissionsthatmaybemade.Thepublishermakesnowarranty,expressorimplied,with
respecttothematerialcontainedherein.
Printedonacid-freepaper
SpringerispartofSpringerScience+BusinessMedia(www.springer.com)
Preface
Continued improvements of transceiver systems-on-a-chip play a key role in the
advancementofmobiletelecommunicationproductsaswellaswirelesssystemsin
medical and remote sensing applications. This book addresses the problems of
escalating CMOS process variability and system complexity that diminish the
reliability and testability of integrated systems, especially relating to the analog
and mixed-signal blocks. Chapter 1 introduces the technical demands and incen-
tivestoadoptvariation-awaredesignapproaches.Thedescribeddesigntechniques
andcircuit-levelattributesarealignedwithcurrentbuilt-intestingandself-calibration
trends for integrated transceivers, which are explained in Chap. 2. The main
attention in this book is on various recent works in which the performances of
analog and mixed-signal blocks were enhanced with digitally adjustable elements
as well as with automatic analog tuning circuits. To convey the concepts, several
casestudiesarepresentedthatspantheoreticalaspectsandexperimentalresultsfor
variation-awaredesignapproaches related toreceiverfront-end circuits,baseband
filter linearization, and data conversion.
The use of digitally controllable elements to compensate for variations is
exemplified with two circuits. First, a distortion cancellation method for opera-
tional transconductance amplifiers that enables a third-order intermodulation
(IM3) improvement of up to 22 dB is presented in Chap. 3. A transconductance-
capacitor lowpass filter with linearized amplifiers is discussed, which was fabri-
cated in a 0.13 lm CMOS process with 1.2 V supply. This filter has a measured
IM3 below -70 dB (with 0.2 V peak-to-peak input signal swing) and 54.5 dB
dynamicrangeoverits195 MHzbandwidth.Thesecondexamplecircuitisa3-bit
two-step quantizer with adjustable reference levels, which is the focal point of
Chap.4.Thisquantizerwasdesignedandfabricatedin0.18 lmCMOStechnology
as part of a continuous-time RD analog-to-digital converter system. With 5 mV
resolutionat a 400 MHz sampling frequency, the quantizer’s power dissipation is
24 mWanditsdieareais0.4 mm2.
AnalternativetoelectricalpowerdetectorsisexplainedinChap.5byoutlining
a strategy for built-in testing of analog circuits with on-chip temperature sensors.
Comparisons of an amplifier’s measurement results at 1 GHz with the measured
v
vi Preface
DC voltage output of an on-chip temperature sensor show that the amplifier’s
powerdissipationcanbemonitoredandits1 dBcompressionpointcanbeestimated
withlessthan1 dBerror.Thesensorhasatunablesensitivityupto200 mV/mW,a
power detection range measured up to 16 mW, and it occupies a die area of
0.012 mm2instandard0.18 lmCMOStechnology.
InChap.6,ananalogcalibrationtechniqueisdiscussedtolessenthemismatch
betweentransistorsinthedifferentialhigh-frequencysignalpathofanalogCMOS
circuits. The described methodology involves auxiliary transistors that sense the
existing mismatch as part of a feedback loop for error minimization. It was
assessed by performing statistical Monte Carlo simulations of a differential
amplifier and a double-balanced mixer designed in CMOS technologies. Finally,
Chap. 7 summarizes the results and conclusions for this calibration case study as
well as the other specific design examples in the book.
Marvin Onabajo
Jose Silva-Martinez
Acknowledgments
We would like to extend our sincere appreciation to our colleagues listed below,
who made this book possible through collaborations on the described research
projects.
Marvin Onabajo, Jose Silva-Martinez
Attenuation-predistortion linearization of operational transconductance ampli-
fiers: Mohamed Mobarak and Edgar Sánchez-Sinencio
Continuous-time lowpass DR modulator with time-domain quantization and
feedback:
Cho-YingLu,VenkataGadde,Yung-ChungLo,Hsien-PuChen,andVijayaramalingam
Periasamy
ObservationofRFcircuitpowerandlinearitycharacteristicswithon-chiptemperature
sensors:
JosepAltet,EduardoAldrete-Vidrio,DiegoMateo,andDidacGómez
vii
Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Background and Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Book Scope and Organization. . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2.1 Linearization Scheme for Transconductance
Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.2.2 Process Variation-Aware Quantization. . . . . . . . . . . . . . 5
1.2.3 Non-Invasive On-Chip Measurement of Thermal
Gradients and RF Power . . . . . . . . . . . . . . . . . . . . . . . 6
1.2.4 Analog Calibration for Transistor Mismatch
Reduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2 Process Variation Challenges and Solutions Approaches . . . . . . . . 9
2.1 Current Trends . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1.1 The Impact of Rising Process Variations. . . . . . . . . . . . 9
2.1.2 Circuit and System Design Tendencies . . . . . . . . . . . . . 11
2.2 System Perspective on Transceiver Built-In Testing
and Self-Calibration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2.1 Digital Correction and Calibration . . . . . . . . . . . . . . . . 14
2.2.2 Analog Measurements and Tuning . . . . . . . . . . . . . . . . 15
2.2.3 Loopback Testing. . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.2.4 Digital Performance Monitoring with Analog
Compensation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.2.5 Combined Digital Monitoring, Analog Measurements,
and Tuning. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.2.6 High-Volume Manufacturing Testing. . . . . . . . . . . . . . . 21
2.2.7 Analog Tuning ‘‘Knobs’’ . . . . . . . . . . . . . . . . . . . . . . . 21
2.2.8 Variation-Aware Design of Digital Circuits . . . . . . . . . . 26
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
ix
x Contents
3 High-Linearity Transconductance Amplifiers with Digital
Correction Capability. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.2 Attenuation-Predistortion Linearization Methodology. . . . . . . . . 33
3.2.1 Single-Ended Circuits . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.2.2 Fully-Differential Circuits . . . . . . . . . . . . . . . . . . . . . . 35
3.2.3 Scaling of Attenuation Ratios. . . . . . . . . . . . . . . . . . . . 35
3.2.4 Volterra Series Analysis. . . . . . . . . . . . . . . . . . . . . . . . 38
3.3 Circuit-Level Design Considerations . . . . . . . . . . . . . . . . . . . . 38
3.3.1 Fully-Differential OTA with Floating-Gate Transistors. . . 38
3.3.2 Proof-of-Concept Filter Realization
and Application Considerations. . . . . . . . . . . . . . . . . . . 40
3.4 Compensation for PVT Variations and High-Frequency
Effects. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.5 Prototype Measurement Results. . . . . . . . . . . . . . . . . . . . . . . . 44
3.5.1 Standalone OTA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
3.5.2 Second-Order Lowpass Filter. . . . . . . . . . . . . . . . . . . . 46
3.6 Summarizing Remarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
4 Multi-Bit Quantizer Design for Continuous-Time Sigma-Delta
Modulators with Reduced Device Matching Requirements. . . . . . . 57
4.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
4.1.1 State of the Art Continuous-Time RD ADCs . . . . . . . . . 58
4.1.2 Quantizer Design Trends . . . . . . . . . . . . . . . . . . . . . . . 59
4.1.3 Quantizer Design Considerations for
the RD Modulator Architecture. . . . . . . . . . . . . . . . . . . 62
4.2 3-Bit Two-Step Current-Mode Quantizer Architecture . . . . . . . . 66
4.2.1 Quantizer Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
4.2.2 Process Variations. . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
4.2.3 Simulation Results and Technology Scaling. . . . . . . . . . 75
4.2.4 ADC Chip Measurements with Embedded Quantizer. . . . 79
4.3 Summarizing Remarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
5 An On-Chip Temperature Sensor for the Measurement
of RF Power Dissipation and Thermal Gradients . . . . . . . . . . . . . 87
5.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
5.2 Temperature Sensing Approach. . . . . . . . . . . . . . . . . . . . . . . . 89
5.2.1 Integration with Transceiver Calibration Techniques. . . . 89
5.2.2 Modeling of the Thermal Coupling. . . . . . . . . . . . . . . . 90
5.2.3 Electro-Thermal Analysis Example:
Low-Noise Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . 93
Contents xi
5.3 CMOS Differential Temperature Sensor Design . . . . . . . . . . . . 96
5.3.1 Previous Sensors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
5.3.2 Design of the Sensor Circuit Topology . . . . . . . . . . . . . 96
5.3.3 Adjustment of the Sensor’s Sensitivity . . . . . . . . . . . . . 99
5.3.4 Sensor Design Optimization Procedure . . . . . . . . . . . . . 101
5.4 Measurement Results. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
5.4.1 Temperature Sensor Characterization. . . . . . . . . . . . . . . 104
5.4.2 RF Testing with the On-Chip DC Temperature
Sensor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
5.5 Summarizing Remarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
6 Mismatch Reduction for Transistors in High-Frequency
Differential Analog Signal Paths. . . . . . . . . . . . . . . . . . . . . . . . . . 113
6.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
6.2 A Mismatch Reduction Technique for Differential
Pair Transistors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
6.2.1 Approach. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
6.2.2 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
6.3 Second-Order Nonlinearity Enhancement
for Double-Balanced Mixers. . . . . . . . . . . . . . . . . . . . . . . . . . 119
6.3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
6.3.2 Alternative Mixer Calibration. . . . . . . . . . . . . . . . . . . . 124
6.3.3 Double-Balanced Mixer Design . . . . . . . . . . . . . . . . . . 131
6.3.4 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
6.4 Summarizing Remarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147
7 Summary and Conclusions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
7.1 Overall Perspective . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
7.2 Discussed Projects. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
Appendix A: OTA Linearization—Volterra Series Analysis . . . . . . . . 155
Appendix B: OTA Linearization—Advanced Phase Compensation . . . 159
Appendix C: OTA Linearization Without Power Budget Increase. . . . 165
Appendix D: Temperature Sensing Analysis—Relationship Between
Circuit Nonlinearities and DC Temperature. . . . . . . . . . 167
Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171