The Design of Low Noise Amplifiers in Deep Submicron CMOS Processes

267 Pages·2016·47.33 MB·English

Gus Winters
Analog Circuits
and Designs
Analog Circuits and Designs

Analog Circuits and Designs
Edited by Gus Winters
Published by University Publications,
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New York, NY 10001, USA
Analog Circuits and Designs
Edited by Gus Winters
© 2018 University Publications
International Standard Book Number: 978-1-9789-0212-1
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Contents
Preface VII
Chapter 1 Functional Testbench Qualification by Mutation Analysis 1
Kai Huang, Peng Zhu, Rongjie Yan and Xiaolang Yan
Chapter 2 The Design of Low Noise Amplifiers in Deep Submicron CMOS Processes:
A Convex Optimization Approach 10
David H. K. Hoe and Xiaoyu Jin
Chapter 3 On the use of an Algebraic Signature Analyzer for Mixed-Signal Systems Testing 26
Vadim Geurkov and Lev Kirischian
Chapter 4 Design of Synthesizable, Retimed Digital Filters using FPGA Based Path
Solvers with MCM Approach: Comparison and CAD Tool 34
Deepa Yagain and A. Vijaya Krishna
Chapter 5 A Modularized Noise Analysis Method with its Application in Readout
Circuit Design 52
Xiao Wang, Zelin Shi and Baoshu Xu
Chapter 6 Ultra-Low-Voltage Self-Body Biasing Scheme and its Application to Basic
Arithmetic Circuits 62
Ramiro Taco, Marco Lanuzza and Domenico Albano
Chapter 7 Investigation of a Superscalar Operand Stack using FO4 and ASIC
Wire-Delay Metrics 72
Christopher Bailey and Brendan Mullane
Chapter 8 High Throughput Pseudorandom Number Generator Based on Variable
Argument Unified Hyperchaos 85
Kaiyu Wang, Qingxin Yan, Shihua Yu, Xianwei Qi, Yudi Zhou and Zhenan Tang
Chapter 9 Parallel Jacobi EVD Methods on Integrated Circuits 94
Chi-Chia Sun, Jürgen Götze and Gene Eu Jan
Chapter 10 Analysis and Implementation of Kidney Stone Detection by Reaction Diffusion
Level Set Segmentation using Xilinx System Generator on FPGA 103
Kalannagari Viswanath and Ramalingam Gunasundari
Chapter 11 Process Variation Aware Wide Tuning Band Pass Filter for Steep Roll-Off
High Rejection 113
Jian Chen and Chien-In Henry Chen
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Chapter 12 VLSI Architectures for Image Interpolation: A Survey 122
C. John Moses, D. Selvathi and V. M. Anne Sophia
Chapter 13 A New CDS Structure for High Density FPA with Low Power 132
Xiao Wang and Zelin Shi
Chapter 14 Engineering Change Orders Design using Multiple Variables Linear
Programming for VLSI Design 139
Yu-Cheng Fan, Chih-Kang Lin, Shih-Ying Chou, Chun-Hung Wang, Shu-Hsien Wu
and Hung-Kuan Liu
Chapter 15 Novel Receiver Architecture for LTE-A Downlink Physical Control Format
Indicator Channel with Diversity 144
S. Syed Ameer Abbas, S. J. Thiruvengadam and S. Susithra
Chapter 16 A Novel Scan Architecture for Low Power Scan-Based Testing 159
Mahshid Mojtabavi Naeini and Chia Yee Ooi
Chapter 17 Low-Area Wallace Multiplier 172
Shahzad Asif and Yinan Kong
Chapter 18 Optimization of Fractional-N-PLL Frequency Synthesizer for Power
Effective Design 178
Sahar Arshad, Muhammad Ismail, Usman Ahmad, Anees ul Husnain
and Qaiser Ijaz
Chapter 19 Gate-Level Circuit Reliability Analysis: A Survey 185
Ran Xiao and Chunhong Chen
Chapter 20 Performance Analysis of Modified Drain Gating Techniques for Low Power and
High Speed Arithmetic Circuits 197
Shikha Panwar, Mayuresh Piske and Aatreya Vivek Madgula
Chapter 21 Radix-2α/4β Building Blocks for Efficient VLSI’s Higher Radices
Butterflies Implementation 202
Marwan A. Jaber and Daniel Massicotte
Chapter 22 A Discrete Event System Approach to Online Testing of Speed
Independent Circuits 215
P. K. Biswal, K. Mishra, S. Biswas and H. K. Kapoor
Chapter 23 High-Efficient Circuits for Ternary Addition 231
Reza Faghih Mirzaee, Keivan Navi and Nader Bagherzadeh
Chapter 24 Design of Smart Power-Saving Architecture for Network on Chip 246
Trong-Yen Lee and Chi-Han Huang
Permissions
List of Contributors
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Preface
This book will elucidate new techniques and their applications in a multidisciplinary approach. It will discuss
the fundamental and modern approaches of analog circuits. As a branch of engineering, analog circuit refers to
the signals which vary from zero to full power supply voltage. They are also referred to as linear signals because
they provide continuous signal range which is not present in other circuits like digital circuits. This book includes
detailed explanations of the various methods and theories related to analog circuits and their designing. It also
provides interesting topics for research which readers can take up. The researches presented in this extensive text
deal with the core subjects related to this branch. Those interested in this field will find this book full of crucial
information. It is a vital tool for all researching and studying this field.
After months of intensive research and writing, this book is the end result of all who devoted their time and
efforts in the initiation and progress of this book. It will surely be a source of reference in enhancing the required
knowledge of the new developments in the area. During the course of developing this book, certain measures
such as accuracy, authenticity and research focused analytical studies were given preference in order to produce a
comprehensive book in the area of study.
This book would not have been possible without the efforts of the authors and the publisher. I extend my sincere
thanks to them. Secondly, I express my gratitude to my family and well-wishers. And most importantly, I thank
my students for constantly expressing their willingness and curiosity in enhancing their knowledge in the field,
which encourages me to take up further research projects for the advancement of the area.
Editor
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1
Functional Testbench Qualification by Mutation Analysis
KaiHuang,1PengZhu,2RongjieYan,3andXiaolangYan2
1DepartmentofInformationScienceandElectronicEngineering,ZhejiangUniversity,Hangzhou310027,China
2InstituteofVeryLargeScaleIntegratedCircuitDesign,ZhejiangUniversity,Hangzhou310027,China
3LaboratoryofComputerScience,InstituteofSoftware,ChineseAcademyofSciences,Beijing100080,China
CorrespondenceshouldbeaddressedtoRongjieYan;[email protected]
AcademicEditor:AviZiv
The growing complexity and higher time-to-market pressure make the functional verification of modern large scale hardware
systemsmorechallenging.Thesechallengesbringtherequirementofahighqualitytestbenchthatiscapableofthoroughlyverifying
thedesign.Torevealabug,thetestbenchneedstoactivateitbystimulus,propagatetheerroneousbehaviorstosomecheckedpoints,
anddetectitatthesecheckedpointsbycheckers.However,currentdominantverificationapproachesfocusonlyontheactivation
aspectusingacoveragemodelwhichisnotqualifiedandignorethepropagationanddetectionaspects.Usinganewmetric,this
paperqualifiesthetestbenchbymutationanalysistechniquewiththeconsiderationofthequalityofthestimulus,thecoverage
model, and the checkers. Then the testbench is iteratively refined according to the qualification feedback. We have conducted
experimentsontwodesignsofdifferentscalestodemonstratetheeffectivenessoftheproposedmethodinimprovingthequality
ofthetestbench.
1.Introduction A coverage model, built according to coverage metrics
suchascodecoverageanduserdefinedfunctionalcoverage
Functionalverificationofmodernhardwaresystemsalways [5, 6], is the main way to evaluate the thoroughness of
requires the largest amount of resources and human efforts verification.Unfortunately,thesecoveragemetricsfocusonly
during the design cycle [1]. Simulation based verification on the quantity of the activated coverpoints and ignore
is the predominant approach in hardware verification [1], the propagation and the sufficiency of the checkers [4].
whichusesatestbenchtoverifythedesignunderverification Meanwhile,thequalityofthefunctionalcoveragemodeland
(DUV).Therearethreemaincomponentsinatestbenchas thecheckersheavilydependsontheexperienceofverification
shown in Figure 1: (1) stimulus to activate the DUV; (2) a engineers. It is easy to omit some corner scenarios in the
set of coverpoints to observe the behavior of the DUV and coveragemodel,anditispracticallyimpossibletoencodeall
collect coverage information; and (3) a set of checkers to correctbehaviorsinthecheckers.Itisevenhardertobuilda
check internal states and outputs of the DUV. To reveal a goodchecker,forsomemodernhardwaresystemsthatmay
bug, the corresponding circuits must be activated first, and exhibitadegreeofindeterminism,andthegoldenoutputis
thentheerroneousresultsmustbepropagatedtosomeports not always known [7, 8]. Therefore, building a high quality
whichareproperlycheckedbycheckers.Tothoroughlyverify functionalcoveragemodelandasetofhighqualityfunctional
ahardwaresystem,weneedsufficientstimulustoactivateall checkersisachallengingtask.
corners of the DUV, a sufficient coverage model to ensure Mutation analysis is originally used to design new test
that all important functions of the DUV are executed, and dataandevaluatethequalityofexistingtestdatainsoftware
a sufficient set of checkers to guarantee that all results of testing[9].Itmodifiesaprogramsyntactically,forexample,
theexecutedfunctionsareadequatelychecked.Allthethree by using a wrong operator. Each mutated program is a
components should be considered to build a high quality mutant. Mutants are created from well-defined mutation
testbench[2–4]. operatorsthatmimictypicalprogrammingerrors.Testskill
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