EE331 Microprocessor NNootteess oonn AADDCC aanndd PPWWMM ((PPIICC1166FF FFaammiillyy)) KHAN WAHID 2009-10 (Term 1) EE 331: Microprocessor 2 16F886 Architecture Exactly same architecture (cid:134) as 16F84A Same 35 instructions (cid:132) All single cycle except (cid:132) program branches (2- cycles) Brown-out Reset (cid:134) In-Circuit Debugger (cid:134) Low-volt Programming (cid:134) Dr. KHAN WAHID 2009-10 (Term 1) EE 331: Microprocessor 3 16F886 Status Register The data memory is partitioned into (cid:134) four banks which contain the GPR and the SFR Each bank extends up to 7Fh (128 (cid:134) bytes) The lower locations of each bank are (cid:132) reserved for the SFR The GPR are implemented as static (cid:132) RAM Dr. KHAN WAHID 2009-10 (Term 1) EE 331: Microprocessor 4 Configuring PORTA When ports are multiplexed, (cid:134) take special caution to configure ADCON1 - On reset, all PORTA pins are analog and read as ‘0’ - To use them as digital, we must configure ADCON1 Dr. KHAN WAHID 2009-10 (Term 1) EE 331: Microprocessor 5 Configuring PORTA – for 16F886 However, it may not be always (cid:134) trivial from the datasheet - However, there are still problems with RA6 and RA7 - Since they are multiplexed with OSC1 and OSC2 respectively, we must configure the “Configuration Bits” - Here, we need to configure ANSEL “Setting the appropriate ANSEL bit high will cause all digital reads on the pin to be read as ‘0’ and allow analog functions on the pin to operate correctly. The state of the ANSEL bits has no affect on digital output functions. A pin with TRIS clear and ANSEL set will still operate as a digital output, but the Input mode will be analog. This can Dr. KHAN WAHID cause unexpected behavior when executing read-modify- 2009-10 (Term 1) write instructions (e.g., bsf, bcf) on the affected port. EE 331: Microprocessor 6 Configuring PORTA/PORTB – for 16F886 Port B is also multiplexed (cid:134) Need to be cautious (cid:132) Demo in MPLAB - Here, we need to configure ANSELH Dr. KHAN WAHID 2009-10 (Term 1) EE 331: Microprocessor 7 Analog-to-Digital Converter The ADC converts an input voltage (that is infinitely (cid:134) variable) to one of a fixed number of output (discrete) values For an n-bit ADC, the maximum output value will be (2n − 1) (cid:134) For an 8-bit ADC, the final value will be (28 − 1), or d’255’ (cid:132) The more the number of output (cid:134) bits, the more will be the number of output steps and the finer is the conversion A measure of the fineness of (cid:132) conversion is called the resolution It has a resolution of V /2n (cid:132) max Dr. KHAN WAHID 2009-10 (Term 1) EE 331: Microprocessor 8 Sample and Hold Since, an ADC cannot convert accurately a changing voltage, (cid:134) a sample and hold (S&H) circuit is often found This takes a sample of the voltage, like a snapshot, and holds it steady (cid:132) for the duration of the conversion (cid:132) Composed of a semiconductor switch and a capacitor Sample: When the switch is closed, (cid:134) the capacitor charges up to the input voltage Vs Vo = Vc = Vs (cid:132) Hold: When the switch opens, the (cid:134) charge is left on the capacitor and Vc (and hence Vo) remains at a fixed Vc = Vs {1 − exp(−t/RC)} value Dr. KHAN WAHID 2009-10 (Term 1) EE 331: Microprocessor 9 Sample and Hold Vc = Vs {1 − exp(−t/RC)} The time that Vc (and hence Vo) takes to reach a value (cid:134) deemed to be acceptable is called the acquisition time Suppose that Vc must rise to 90% of its final value (Vs) (cid:132) To ensure good accuracy in data conversion, the error introduced by this process should be less than the equivalent of half of 1 LSB For an 8-bit conversion, this implies that the acquired voltage value Vc must reach ≥ (511/512)Vs, or 0.9980Vs For a 10-bit conversion it must be ≥ (2047/2048)Vs, or 0.9995Vs Dr. KHAN WAHID 2009-10 (Term 1) EE 331: Microprocessor 10 16F886 ADC Powerful 10-bit 8-channel ADC (cid:134) module The ADC is controlled by: ADCON0 (cid:134) and ADCON1 The result of the conversion is placed (cid:134) into: ADRESH and ADRESL Other SFRs also have an important (cid:134) impact on the ADC: TRISA and TRISE (used for analog (cid:132) input) PIR1 and PIE1 contain the ADC (cid:132) INT flag and INT enable bits A set of procedure must be followed to properly complete one conversion Dr. KHAN WAHID 2009-10 (Term 1)
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