Green Computing with Emerging Memory: Low-Power Computation for Social Innovation

213 Pages·2013·6.533 MB·English

by  Takayuki Kawahara, Hiroyuki Mizuno (auth.), Takayuki Kawahara, Hiroyuki Mizuno (eds.)

Green Computing with Emerging Memory
Takayuki Kawahara Hiroyuki Mizuno
•
Editors
Green Computing
with Emerging Memory
Low-Power Computation
for Social Innovation
123
Editors
TakayukiKawahara HiroyukiMizuno
Central Research Laboratory Central Research Laboratory
Hitachi Ltd Hitachi Ltd
Tokyo Tokyo
Japan Japan
ISBN 978-1-4614-0811-6 ISBN 978-1-4614-0812-3 (eBook)
DOI 10.1007/978-1-4614-0812-3
SpringerNewYorkHeidelbergDordrechtLondon
LibraryofCongressControlNumber:2012946754
(cid:2)SpringerScience+BusinessMediaNewYork2013
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Preface
Inthisbook,weintroducecomputinginnovationinprogress:greencomputingfor
a sustainable world. We have done our best to provide a compact overview of a
green computing scheme, including cutting-edge CMOS low-power devices,
comprehensive spintronics knowledge, trends in low-voltage memory and non-
volatile RAM, low voltage (low leakage) computing circuits and systems, and a
low-power computing plan that uses non-volatile memory. Our objective is to
provideareferencematerialthatcanbesimultaneouslyusedbydeviceengineers,
circuit engineers, and computer engineers as they strive for innovative green
computingthatmovesbeyond conventionallow-voltageoperation andtowardthe
new low-power computer technology of the future. From the perspective of
computing architecture, historically, innovation in memory technology has led to
progress(andviceversa).Now,non-volatileRAMhasnearlyapproachedthestage
of practical application. It offers an infinite number offast write and read opera-
tions as well as non-volatility, and relies on the development of spintronics
technology.We areconfidentthatthismemoryinnovation willfunction asoneof
the main propulsion in the realization of green computing.
Thegoal ofhigherperformancehas always been at oddswith increasedpower
consumption. In the 1980s, CMOS device technology was widely introduced for
low power operation, while in the 1990s, low-voltage circuit technology was
intensively developed, and in the 2000s, system level handling with low-voltage
circuitry was accelerated. Now, we need to find a new direction for further
advancement that by necessity must feature an interdisciplinary approach. One
component could be the use of emerging memory, described above. Another
componentislikelytooriginatefromourdailyhabitofsavingpowerconsumption
byturningoffelectricaldeviceswhennotinuse.Ideally,wewouldliketoexpand
such habits to IT equipment in such a way that, even though a particular device
seemstobeturnedoff,itisactuallyachievingmaximumperformance.Isthiseven
possible?Anexperimentaltrialisincludedinthisbook.Whatweneedisafusion
of power control technology and IT technology. The key to achieving this is to
ensure that any internal computation status is memorized before the power is
v
vi Preface
turned off and retained without consuming power. Yes, this is the use of the first
component, memory.
This book is organized as follows. After we discuss the background and
motivationinChap. 1,readerscomprehensivelylearnanoverviewofcutting-edge
CMOS low-power devices in Chap. 2 and spintronics technology that utilizes the
propertiesofboththechargeandspinofelectronsinChap. 3.Thoughbothaspects
are indispensable for the future development of LSI technology, there seem to be
veryfewcasesinwhichbotharediscussedinaneasy-to-understandmannerinone
book. We describe the trends of low-voltage memory in Chaps. 4 and 5. While
these belong to the realm of conventional memory, we summarize the key points
of low-voltage SRAM (Chap. 4) and low-voltage DRAM (Chap. 5) to provide
readers with insights into how power can be lowered. We show the evolution of
theinterfacebetweenmemoryandprocessoraswellasthepredicteddevelopment
ofmemoryhierarchysystemsinthefuture.Chapter 6isdevotedtoSTT-RAM(or
SPRAM, spin-transfer torque RAM) technology. How to take advantage of non-
volatile RAM is the key to achieving low power consumption and high perfor-
manceforITequipment,andsinceSTT-RAMisthemostpromising(oruptonow,
onlypossible)solutionamongvariouscandidates,itisdescribedindetail.Thenext
two chapters are devoted to descriptions of low-power computing technology in
circuits and system levels. In Chap. 7, the latest low-voltage computing technol-
ogy,whichisbeingusedtopreventleakagecurrents,isexplainedinminutedetail,
covering many aspects from basic circuitry elements to the system as a whole. In
Chap. 8,wepresentanexampleofalow-powercomputingtechnologyusingnon-
volatile RAM. This includes a proposal to turn off IT equipment frequently when
not in use, which will hopefully function as an example for future green com-
puting. Our summary is presented in Chap. 9, along with a brief mention of the
direction we intend to take in the future.
This book should prove useful to both computing engineers and device engi-
neers due to its description of a new computing innovation for low power con-
sumption that does not sacrifice performance over the conventional low-voltage
operation.
Takayuki Kawahara
Hiroyuki Mizuno
Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Takayuki Kawahara and Hiroyuki Mizuno
2 Low-Power Electron Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Nobuyuki Sugii
3 Low-Power Spin Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Kenchi Ito
4 Low-Power SRAM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Masanao Yamaoka
5 Low-Power DRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Akira Kotabe
6 Low-Power NV-RAM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Riichiro Takemura
7 On-Chip Power Gating Technique . . . . . . . . . . . . . . . . . . . . . . . . 141
Yusuke Kanno
8 Low Power Processing with NV-RAM . . . . . . . . . . . . . . . . . . . . . 183
Takayuki Kawahara and Chihiro Yoshimura
9 Closing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207
Takayuki Kawahara and Hiroyuki Mizuno
Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 211
vii
Chapter 1
Introduction
Takayuki Kawahara and Hiroyuki Mizuno
1.1 Challenge to Achieve Sustainable Green IT
Wearelivinginaconvenientsocialsocietyandweareenjoyingthatconvenience
intowns,offices,andathome.Moreover,allcomponents,equipment,anddevices
areconnectedbynetworks,whichmeanwearelivinginatightlyconnectedworld.
However, this world is very greedy for power consumption and it uses resources
voraciously,whichisthemostcrucialproblemtoday.Althoughweshouldchange
the worldinto being more environmentally friendly and greener, we should try to
retain its convenience.
Onepromisingsolutiontothisissimple,i.e., toturnoffdevices whenthey are
not in use, but instantly turn them on when they are needed with no loss of
performance. This would also assist in reducing the power consumption of the
equipment itself, which is normal in our daily activities. For example, when we
leave a room, we should turn off the lights. Also, power consumption during
operation should be reduced as much as possible such as by using LEDs
(i.e.cutting-edgedevice)insteadofincandescentbulbs.And,standbypowerwhen
shuttingdown,such asleakage current,shouldbezero.Attempts toprovide these
functions to information technology (IT) equipment and LSIs have recently been
carried out. The most important thing in doing this is to realize we are treating
information. Therefore, when shutting down equipment to reduce power con-
sumption, we should memorize any of its internal states immediately without
consuming power, which is intrinsically related to treatment information in the
equipment and LSIs.
T.Kawahara(&)(cid:2)H.Mizuno
CentralResearchLaboratory,HitachiLtd,Tokyo,Japan
e-mail:[email protected]
H.Mizuno
e-mail:[email protected]
T.KawaharaandH.Mizuno(eds.),GreenComputingwithEmergingMemory, 1
DOI:10.1007/978-1-4614-0812-3_1,(cid:2)SpringerScience+BusinessMediaNewYork2013
2 T.KawaharaandH.Mizuno
(BkWh/year)
25 (Source: Ministry of Economy, Trade and Industry (METI))
n
a
ap 20 Networks
J （routers, switches）
n
n i
o
ati 15
p
si
s
Di
er 10 Server
w PC
o
P
5
TV
0
2005 2010 2015 2020 2025
(Year)
Fig.1.1 ProjectionofpowerconsumptionbyITequipment
Thisbookdiscusseslow-powertechnologyforLSIcircuitsandsystemlevelsto
solve this issue. That is, it considers low-voltage operation and takes full advan-
tage of the characteristics of memory devices.
1.2 Trends in Power Consumption and Measures to Reduce It
The rapid increase in the power consumption of IT equipment systems according
to the development of the information society has become a serious issue
throughout the entire world. Power consumed by IT equipment is expected to be
ninetimesthatoftodayby2025duetotherapidlyincreasingspreadofequipment
by BRICs. Power consumption by 2025 might reach about 24 BkWh, even in
Japan, which is five times that of today, as shown in Fig. 1.1 [1].
Consequently, the power consumed by which equipment should we decrease?
Electrical energy consumed by equipment and devices is represented by the fol-
lowing equation.
Electric energy consumption (W (cid:3) h)¼ðactive power)(cid:3)ðoperating time)
þ (standby power)(cid:3)ðstandby time)
þ D (transition energy)
ð1:1Þ
D(Transition energy)isthe energy required totransitfrom an active state toa
standbystateandweshouldreduceeachtermwhilemaintainingperformance.The
four main measures to reduce electrical energy consumption are as follows:
1 Introduction 3
(1) Reducingactivepower,standbypower,andtransitionenergy.However,when
activepowerisreduced,standbypowerhastendedtoincreaseinrecentLSIs.
(2) Active power is generally greater than standby power and is strongly pro-
portionaltotheperformanceofLSIs.Thus,inthe(activepower) 9 (operating
time)term,theshorteningofoperatingtimebecomesimportantalongwiththe
reduction of active power itself while retaining performance.
(3) Standbypowershouldbesetassmallaspossible.Zeropowerconsumptionin
thisstateshouldbeseriouslyconsidered.Here,in(standbypower) 9 (standby
time), operating time in the previous term and standby time have properties
that when operating time is shortened, standby time increases.
(4) D (Transition energy) is related to the grain size in the spatial and temporal
regionsofLSIsincontrollingtheir power.Ifwe failtochoose anappropriate
grain size, this term becomes dominant, and we fail to decrease power.
In addition, active power is expressed as
Active power¼a(cid:3)f (cid:3)C(cid:3)V (cid:3)V þI (cid:3)V ð1:2Þ
dd int leak dd
V is the voltage of the external power supply to LSIs, V is the voltage
dd int
generatedinLSIs,andinsomecasesV = V .Theaistheactivationrateofthe
dd int
region of interest. That is, the amount of time where LSIs are actually running in
thewholetime,whenviewedfromtheaspectoffinergranularity.Itisimportantto
set a smaller a as well as reduce the operating time. Note that active power also
contains I . The I (cid:3)V is equivalent value to f (cid:3)C(cid:3)V (cid:3)V in many
leak leak dd dd int
cases in recent LSIs.
Therefore,itisnecessarytoreducetheactivationrateandachievelow-voltage
operation in the first term to reduce active power, and reduce the leakage current
and achieve low-voltage operation in the second term of Eq. (1.2).
Variouskindsoflow-voltagetechnologieshavebeenproposed.Themainissue
here is the exponential increase in leakage current during low-voltage operation
while maintaining performance. This is because the threshold voltage of Vth
should be scaled according to low-voltage operation under these conditions.
Leakagecurrentincreases,eveninactivemode,asseeninFig. 1.2a[2].Numerous
circuits that remain inactive during active periods will start to generate sub-
threshold current, causing huge active current in chips to further reduce Vth.
Therefore,technologiestoreduceleakagecurrentsuchascontrollingthesubstrate
voltage [3, 4], Fig. 1.2b, and inserting a metal-oxide semiconductor (MOS)
between the power line and combined source terminal of complementary metal-
oxide semiconductor (CMOS) circuits [5, 6], Fig. 1.2c, have been proposed and
developed.Thesetechnologieshavealsobeendiscussedandappliedatthesystem
level of LSIs [7, 8]. In addition, dopeless fully depleted SOI technology [9] has
been proposed and intensively developed as variations in threshold voltage have
become a difficult target to attain. Other low-power circuit technologies such as
charge recycling schemes [10] and instant ON/OFF termination [11] have also
been discussed in addition to low-voltage operation.
4 T.KawaharaandH.Mizuno
101
VPH
100 I VDD
active
10-1
)
A I
nt ( 10-2 AC
rre 10-3 VSS
u
C VNH
10-4 IDC tTRC= =7 518°C0 ns 1993: Well-driven SA
10-5
S= 97 mV/decade
10-6 16 M 64 M 256 M 1 G 4 G 16 G 64 G (b)VGSreverse biasing
Capacity (bits)
VDD
3.3 2.5 2.0 1.5 1.2 1.0 0.8
VDD(V) Local VDD
0.53 0.40 0.32 0.24 0.19 0.16 0.13
Extrapolated VTat 25°C (V)
VSS
2.0 6.7 20 44 98 210 470 1993: 256Mb DRAM
Wtotal / Leff (×106)
(a) Projected current consumption (c)V reverse biasing
BS
Fig.1.2 Operationoflow-voltagecircuits
Standby power in the consumption of electrical energy (1.1) contains the DC
current of the internal power supply of the generation circuit and the refresh
current of DRAMs from the viewpoint of the system level as well as I (cid:3)V .
leak dd
These are also proportional to the value of V . It is important to reduce these
dd
components as they are generally necessary for low-voltage operation. Further-
more, the operating time should be set as short as possible and standby time
increased, while standby power should be close to zero. This approach is called
instantaneous ON/OFF switching.
1.3 Green Computing with Memory
Current memory systems have been forming a deep hierarchy in speed and
capacity to achieve better computing performance. The use of volatile and non-
volatilememoriesandstoragehasbeencombined(Fig. 1.3).High-speedoperation
withlarge-scalememoryspacehasbeenachievedtodatebycombininghigh-speed
operation with small capacity and low-speed operation but with large capacity
memories. However, we are facing a problem that this sort of design will lead to
slow start-ups, long idle times, and low-power efficiency during actual operation.