Computer Systems. Digital Design, Fundamentals of Computer Architecture and ARM Assembly Language

307 Pages·2022·8.341 MB·

by  Ata Elahi

Computer Systems
Ata Elahi
Computer Systems
Digital Design, Fundamentals of Computer
Architecture and ARM Assembly Language
Second Edition
AtaElahi
SouthernConnecticutStateUniversity
NewHaven,CT,USA
ISBN978-3-030-93448-4 ISBN978-3-030-93449-1 (eBook)
https://doi.org/10.1007/978-3-030-93449-1
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Thisbookisdedicated toSara,Shabnam, and
Aria.
Preface
This textbook is the result of my experiences teaching computer systems at the
ComputerScienceDepartmentatSouthernConnecticutStateUniversitysince1986.
The book is divided into three sections: Digital Design, Introduction to Computer
Architecture and Memory, and ARM Architecture and Assembly Language. The
Digital Design section includes a laboratory manual with 15 experiments using
Logisimsoftwaretoenforceimportantconcepts.TheARMArchitectureandAssem-
bly Language section includes several examples of assembly language programs
usingKeilμVision5developmenttools.
Intended Audience
This book is written primarily for a one-semester course as an introduction to
computer hardware and assembly language for students majoring in Computer
Science,InformationSystems,andEngineeringTechnology.
ChangesintheSecondEdition
TheexpansionofChap.1byaddinghistoryofcomputerandTypesofComputers.
Expanded Chap. 6 “Introduction to Computer Architecture” by adding Computer
AbstractionLayersandCPUInstructionExecutionSteps.Themostrevisiondoneon
ARM Architecture and Assembly Language by incorporating Keil μvision5,
reorderingChaps.9and10,andaddingChap.11“CBitwiseandControlStructures
usedforProgrammingwithCandARMAssemblyLanguage.”
Organization
The material of this book ispresented in sucha way that no specialbackground is
requiredtounderstandthetopics.
vii
viii Preface
Chapter 1–Signals and Number Systems: Analog Signal, Digital Signal, Binary
Numbers, Addition and Subtraction of binary numbers, IEEE 754 Floating Point
representations,ASCII,Unicode,SerialTransmission,andParallelTransmission
Chapter 2–Boolean Logics and Logic Gates: Boolean Logics, Boolean Algebra
Theorems,LogicGates,IntegratedCircuit(IC),BooleanFunction,TruthTableofa
functionandusingBooleanTheoremstosimplifyBooleanFunctions
Chapter3–Minterms,Maxterms,KarnaughMap(K-Map)andUniversalGates:
Minterms, Maxterms, Karnaugh Map (K-Map) to simplify Boolean Functions,
Don’tCareConditionsandUniversalGates
Chapter 4–Combinational Logic: Analysis of Combination Logic, Design of
Combinational Logic, Decoder, Encoder, Multiplexer, Half Adder, Full Adder,
Binary Adder, Binary Subtractor, Designing Arithmetic Logic Unit (ALU), and
BCDtoSevenSegmentDecoder
Chapter 5–Synchronous Sequential Logic: Sequential Logic such as S-R Latch,
D-Flip Flop, J-K Flip Flop, T-Flip Flop, Register, Shift Register, Analysis of
Sequential Logic, State Diagram, State Table, Flip Flop Excitation Table, and
DesigningCounter
Chapter6–IntroductiontoComputerArchitecture:ComponentsofaMicrocom-
puter,CPUTechnology,CPUArchitecture,InstructionExecution,Pipelining,PCI,
PCIExpress,USB,andHDMI
Chapter 7–Memory: Memory including RAM, SRAM, DISK, SSD, Memory
Hierarchy, Cache Memory, Cache Memory Mapping Methods, Virtual Memory,
PageTable,andthememoryorganizationofacomputer
Chapter 8– Assembly Language and ARM Instructions Part I: ARM Processor
Architecture, and ARM Instruction Set such as Data Processing, Shift, Rotate,
Unconditional Instructions and Conditional Instructions, Stack Operation, Branch,
Multiply Instructions, and several examples of converting HLL to Assembly
Language.
Chapter 9–ARM Assembly Language Programming Using Keil Development
Tools:CovershowtouseKeildevelopmentsoftwareforwritingassemblylanguage
usingARMInstructions,CompilingAssemblyLanguage,andDebugging
Chapter10–ARMInstructionsPartIIandInstructionFormats:Thischapteristhe
continuationofChap.8whichcoversLoadandStoreInstructions, PseudoInstruc-
tions,ARMAddressingMode,andInstructionformats.
Chapter11–CBitwiseandControlStructuresUsedforProgrammingwithCand
ARMAssemblyLanguage
InstructionResources:Theinstructionresourcescontain
(cid:129) 15LaboratoryexperimentsusingLogisim.
(cid:129) Solutionstotheproblemsofeachchapter.
(cid:129) Powerpointsofeachchapter
NewHaven,CT,USA AtaElahi
Acknowledgments
I would like to express my special thanks to Professor Lancor Chairman of Com-
puterScienceDepartmentatSouthernConnecticutStateUniversityforhersupport
aswellasProfessorHervPodnarforhisguidance.
I wish to acknowledge and thank Ms. Mary E. James, Senior Editor in Applied
Sciencesandherassistant,Ms.ZoeKennedy,fortheirsupport.
My special thanks to Eric Barbin, Alex Cushman, Marc Gajdosik, Nickolas
Santini,NicholasBittar,OmarAbid,andAlirezaGhodsfortheirhelpindeveloping
the manuscript. Finally, I would like to thank the students of CSC 207 Computer
SystemsofSpring2020.
ix
Contents
1 SignalsandNumberSystems. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1.1 CPU. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2 HistoricalDevelopmentoftheComputer. . . . . . . . . . . . . . . . . 3
1.3 HardwareandSoftwareComponentsofaComputer. . . . . . . . . 3
1.4 TypesofComputers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.5 AnalogSignals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.5.1 CharacteristicsofanAnalogSignal. . . . . . . . . . . . . . . 6
1.6 DigitalSignals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.7 NumberSystem. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.7.1 ConvertingfromBinarytoDecimal. . . . . . . . . . . . . . . 9
1.7.2 ConvertingfromDecimalIntegertoBinary. . . . . . . . . 10
1.7.3 ConvertingDecimalFractiontoBinary. . . . . . . . . . . . 10
1.7.4 ConvertingfromHextoBinary. . . . . . . . . . . . . . . . . . 11
1.7.5 BinaryAddition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
1.8 ComplementandTwo’sComplement. . . . . . . . . . . . . . . . . . . . 13
1.8.1 SubtractionofUnsignedNumberUsingTwo’s
Complement. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
1.9 Unsigned,SignedMagnitude,andSignedTwo’sComplement
BinaryNumber. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
1.9.1 UnsignedNumber. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
1.9.2 SignedMagnitudeNumber. . . . . . . . . . . . . . . . . . . . . 15
1.9.3 SignedTwo’sComplement. . . . . . . . . . . . . . . . . . . . . 15
1.10 BinaryAdditionUsingSignedTwo’sComplement. . . . . . . . . . 16
1.11 FloatingPointRepresentation. . . . . . . . . . . . . . . . . . . . . . . . . 17
1.11.1 SingleandDoublePrecisionRepresentations
ofFloatingPoint. . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
1.12 Binary-CodedDecimal(BCD). . . . . . . . . . . . . . . . . . . . . . . . . 19
1.13 CodingSchemes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
1.13.1 ASCIICode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
xi
xii Contents
1.13.2 UniversalCodeorUnicode. . . . . . . . . . . . . . . . . . . . . 20
1.14 ParityBit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
1.14.1 EvenParity. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
1.14.2 OddParity. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
1.15 Clock. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
1.16 TransmissionModes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
1.16.1 AsynchronousTransmission. . . . . . . . . . . . . . . . . . . . 25
1.16.2 SynchronousTransmission. . . . . . . . . . . . . . . . . . . . . 26
1.17 TransmissionMethods. .. . . .. . . .. . . .. . . .. . . .. . . .. . . .. 26
1.17.1 SerialTransmission. . . . . . . . . . . . . . . . . . . . . . . . . . 27
1.17.2 ParallelTransmission. . . . . . . . . . . . . . . . . . . . . . . . . 27
1.18 Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2 BooleanLogicsandLogicGates. . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2.2 BooleanLogicsandLogicGates. . . . . . . . . . . . . . . . . . . . . . . 33
2.2.1 ANDLogic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
2.2.2 ORLogic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
2.2.3 NOTLogic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
2.2.4 NANDGate. . . . . . . .. . . . . . .. . . . . . . .. . . . . . . .. 36
2.2.5 NORGate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2.2.6 ExclusiveORGate. . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.2.7 ExclusiveNORGate. . . . . . . . . . . . . . . . . . . . . . . . . 37
2.2.8 Tri-StateDevice. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.2.9 MultipleInputsLogicGates. . . . . . . . . . . . . . . . . . . . 38
2.3 IntegratedCircuit(IC)Classifications. . . . . . . . . . . . . . . . . . . . 39
2.3.1 Small-ScaleIntegration(SSI). . . . . . . . . . . . . . . . . . . 40
2.3.2 IntegratedCircuitPinsNumbering. . . . . . . . . . . . . . . . 40
2.3.3 Medium-ScaleIntegration(MSI). . . . . . . . . . . . . . . . . 41
2.3.4 Large-ScaleIntegration(LSI). . . . . . . . . . . . . . . . . . . 41
2.3.5 Very-Large-ScaleIntegration(VLSI). . . . . . . . . . . . . . 41
2.4 BooleanAlgebraTheorems. . . . . . . . . . . . . . . . . . . . . . . . . . . 41
2.4.1 DistributiveTheorem. . . . . . . . . . . . . . . . . . . . . . . . . 42
2.4.2 DeMorgan’sTheoremI. . . . . . . . . . . . . . . . . . . . . . . 43
2.4.3 DeMorgan’sTheoremII. . . . . . . . . . . . . . . . . . . . . . 43
2.4.4 CommutativeLaw. . . . . . . . . . . . . . . . . . . . . . . . . . . 44
2.4.5 AssociativeLaw. . . . . . . . . . . . . . . . . . . . . . . . .. . . . 44
2.4.6 MoreTheorems. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
2.5 BooleanFunction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
2.5.1 ComplementofaFunction. . . . . . . . . . . . . . . . . . . . . 45
2.6 Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Problems. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46